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Use %precedence in verilog_parser.y 

Signed-off-by: Claire Wolf <claire@symbioticeda.com>
This commit is contained in:
Claire Wolf 2020-07-15 11:54:28 +02:00
parent 24540291c7
commit 7a79843cc3
1 changed files with 4 additions and 4 deletions
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8
frontends/verilog/verilog_parser.y
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@ -299,14 +299,14 @@ static void rewriteAsMemoryNode(AstNode *node, AstNode *rangeNode)
%left '+' '-' %left '+' '-'
%left '*' '/' '%' %left '*' '/' '%'
%left OP_POW %left OP_POW
%left OP_CAST %precedence OP_CAST
%right UNARY_OPS %precedence UNARY_OPS
%define parse.error verbose %define parse.error verbose
%define parse.lac full %define parse.lac full
%nonassoc FAKE_THEN %precedence FAKE_THEN
%nonassoc TOK_ELSE %precedence TOK_ELSE
%debug %debug
%locations %locations