From 40c690b0305b15e51d7dec2e2b5ca1051c37be95 Mon Sep 17 00:00:00 2001 From: Jannis Harder Date: Wed, 30 Oct 2024 17:30:44 +0100 Subject: [PATCH 1/2] extract_fa: Add test case --- tests/various/bug3879.ys | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 tests/various/bug3879.ys diff --git a/tests/various/bug3879.ys b/tests/various/bug3879.ys new file mode 100644 index 000000000..7163a1f56 --- /dev/null +++ b/tests/various/bug3879.ys @@ -0,0 +1,29 @@ +read_verilog < Date: Wed, 30 Oct 2024 17:30:56 +0100 Subject: [PATCH 2/2] extract_fa: Invert xor3/xnor3 output when inverting majority3 input --- passes/techmap/extract_fa.cc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/passes/techmap/extract_fa.cc b/passes/techmap/extract_fa.cc index ec1979f3b..1984f82f5 100644 --- a/passes/techmap/extract_fa.cc +++ b/passes/techmap/extract_fa.cc @@ -412,14 +412,15 @@ struct ExtractFaWorker facache[fakey] = make_tuple(X, Y, cell); } + bool invert_y = f3i.inv_a ^ f3i.inv_b ^ f3i.inv_c; if (func3.at(key).count(xor3_func)) { - SigBit YY = invert_xy ? module->NotGate(NEW_ID, Y) : Y; + SigBit YY = invert_xy ^ invert_y ? module->NotGate(NEW_ID, Y) : Y; for (auto bit : func3.at(key).at(xor3_func)) assign_new_driver(bit, YY); } if (func3.at(key).count(xnor3_func)) { - SigBit YY = invert_xy ? Y : module->NotGate(NEW_ID, Y); + SigBit YY = invert_xy ^ invert_y ? Y : module->NotGate(NEW_ID, Y); for (auto bit : func3.at(key).at(xnor3_func)) assign_new_driver(bit, YY); }