From 7250c57c5a05139ca03544a31fe40b52e4e73486 Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Mon, 17 Jun 2019 10:28:51 -0700
Subject: [PATCH 1/2] Re-enable &dc2

---
 passes/techmap/abc9.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc
index 0e4053e55..54aba3b18 100644
--- a/passes/techmap/abc9.cc
+++ b/passes/techmap/abc9.cc
@@ -29,7 +29,7 @@
 						"&st; &if -g -K 6; &dch -f; &if {W}; &save; &load; "\
 						"&st; &if -g -K 6; &synch2; &if {W}; &save; &load"
 #else
-#define ABC_COMMAND_LUT "&st; &sweep; &scorr; "/*"&dc2; "*/"&retime; &dch -f; &ps -l; &if {W} {D} -v; "/*"&mfs; "*/"&ps -l"
+#define ABC_COMMAND_LUT "&st; &sweep; &scorr; &dc2; &retime; &st; &dch -f; &ps -l; &if {W} {D} -v; "/*"&mfs; "*/"&ps -l"
 #endif
 
 

From c15ee827f4a171abe3108dba8f9ad0d7078eb306 Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Sun, 16 Jun 2019 12:08:03 -0700
Subject: [PATCH 2/2] Try -W 300

---
 techlibs/xilinx/synth_xilinx.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index a11648873..45bc47f24 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -25,7 +25,8 @@
 USING_YOSYS_NAMESPACE
 PRIVATE_NAMESPACE_BEGIN
 
-#define XC7_WIRE_DELAY "160"
+#define XC7_WIRE_DELAY "300" // Number with which ABC will map a 6-input gate
+                             // to one LUT6 (instead of a LUT5 + LUT2)
 
 struct SynthXilinxPass : public ScriptPass
 {