diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index e22bb80cd..3acea01d2 100644
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -105,6 +105,8 @@ module GP_COUNT14(input CLK, input wire RST, output reg OUT);
 
 endmodule
 
+//keep constraint needed to prevent optimization since we have no outputs
+(* keep *)
 module GP_SYSRESET(input RST);
 	parameter RESET_MODE = "RISING";