mirror of https://github.com/YosysHQ/yosys.git
ast: don't suggest use in external projects
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@ -20,10 +20,10 @@
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*
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* This is the AST frontend library.
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*
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* The AST frontend library is not a frontend on it's own but provides a
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* generic abstract syntax tree (AST) abstraction for HDL code and can be
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* used by HDL frontends. See "ast.h" for an overview of the API and the
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* Verilog frontend for an usage example.
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* The AST frontend library is not a frontend on its own but provides an
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* abstract syntax tree (AST) abstraction for the open source Verilog frontend
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* at frontends/verilog.
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*
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*
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*/
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@ -17,7 +17,9 @@
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*
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* ---
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*
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* This is support code for the Verilog frontend at frontends/verilog
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* The AST frontend library is not a frontend on its own but provides an
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* abstract syntax tree (AST) abstraction for the open source Verilog frontend
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* at frontends/verilog.
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*
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*/
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