riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

ice40: Fix LUT input indices in opt_lut -dlogic (again). 

Fixes #2061.
This commit is contained in:
Marcelina Kościelnicka 2021-07-10 20:46:48 +02:00
parent 7a5ac90985
commit 726fabd65e
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
techlibs/ice40/synth_ice40.cc
View File

@ -399,7 +399,7 @@ struct SynthIce40Pass : public ScriptPass
run("ice40_wrapcarry -unwrap"); run("ice40_wrapcarry -unwrap");
run("techmap -map +/ice40/ff_map.v"); run("techmap -map +/ice40/ff_map.v");
run("clean"); run("clean");
run("opt_lut -dlogic SB_CARRY:I0=2:I1=1:CI=0"); run("opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3");
} }
if (check_label("map_cells")) if (check_label("map_cells"))