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verilog: attributes before task enable (but 13 s/r conflicts)

This commit is contained in:
Eddie Hung 2020-05-14 16:10:11 -07:00
parent e7fd8912f0
commit 7101ef550b
1 changed files with 8 additions and 10 deletions
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18
frontends/verilog/verilog_parser.y
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@ -2217,23 +2217,23 @@ behavioral_stmt:
defattr | assert | wire_decl | param_decl | localparam_decl | typedef_decl |
non_opt_delay behavioral_stmt |
simple_behavioral_stmt ';' | ';' |
hierarchical_id attr {
attr hierarchical_id {
AstNode *node = new AstNode(AST_TCALL);
node->str = *$1;
delete $1;
node->str = *$2;
delete $2;
ast_stack.back()->children.push_back(node);
ast_stack.push_back(node);
append_attr(node, $2);
append_attr(node, $1);
} opt_arg_list ';'{
ast_stack.pop_back();
} |
TOK_MSG_TASKS attr {
attr TOK_MSG_TASKS {
AstNode *node = new AstNode(AST_TCALL);
node->str = *$1;
delete $1;
node->str = *$2;
delete $2;
ast_stack.back()->children.push_back(node);
ast_stack.push_back(node);
append_attr(node, $2);
append_attr(node, $1);
} opt_arg_list ';'{
ast_stack.pop_back();
} |
@ -2330,8 +2330,6 @@ behavioral_stmt:
ast_stack.pop_back();
};
;
unique_case_attr:
/* empty */ {
$$ = false;