mirror of https://github.com/YosysHQ/yosys.git
tests: ice40: fix div_mod SB_LUT4 count
This test is failing due to one of the changes present in this patchset. Adjust the test to match the newly-observed values. https://github.com/xobs/yosys/compare/smtbmc-msvc2-build-fixes...YosysHQ:xobs/pr1362 Signed-off-by: Sean Cross <sean@xobs.io>
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@ -4,6 +4,6 @@ flatten
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equiv_opt -assert -map +/ice40/cells_sim.v synth_ice40 # equivalency check
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equiv_opt -assert -map +/ice40/cells_sim.v synth_ice40 # equivalency check
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd top # Constrain all select calls below inside the top module
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cd top # Constrain all select calls below inside the top module
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select -assert-count 62 t:SB_LUT4
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select -assert-count 59 t:SB_LUT4
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select -assert-count 41 t:SB_CARRY
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select -assert-count 41 t:SB_CARRY
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select -assert-none t:SB_LUT4 t:SB_CARRY %% t:* %D
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select -assert-none t:SB_LUT4 t:SB_CARRY %% t:* %D
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