diff --git a/tests/arch/quicklogic/qlf_k6n10f/dspv2_simd.ys b/tests/arch/quicklogic/qlf_k6n10f/dspv2_simd.ys
index d1440c921..aa79ddcb7 100644
--- a/tests/arch/quicklogic/qlf_k6n10f/dspv2_simd.ys
+++ b/tests/arch/quicklogic/qlf_k6n10f/dspv2_simd.ys
@@ -19,7 +19,6 @@ ql_dsp_macc -dspv2
 techmap -map +/mul2dsp.v -map +/quicklogic/qlf_k6n10f/dspv2_map.v -D USE_DSP_CFG_PARAMS=0 -D DSP_SIGNEDONLY -D DSP_A_MAXWIDTH=32 -D DSP_B_MAXWIDTH=18 -D DSP_A_MINWIDTH=10 -D DSP_B_MINWIDTH=10 -D DSP_NAME=$__MUL32X18
 chtype -set $mul t:$__soft_mul
 techmap -map +/mul2dsp.v -map +/quicklogic/qlf_k6n10f/dspv2_map.v -D USE_DSP_CFG_PARAMS=0 -D DSP_SIGNEDONLY -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=9 -D DSP_A_MINWIDTH=4 -D DSP_B_MINWIDTH=4 -D DSP_NAME=$__MUL16X9
-# TODO is this missing from synth_quicklogic?
 read_verilog -lib +/quicklogic/qlf_k6n10f/dspv2_sim.v
 select -assert-count 2 t:dspv2_16x9x32_cfg_ports
 select -assert-count 0 t:dspv2_32x18x64_cfg_ports
@@ -51,7 +50,6 @@ ql_dsp_macc -dspv2
 techmap -map +/mul2dsp.v -map +/quicklogic/qlf_k6n10f/dspv2_map.v -D USE_DSP_CFG_PARAMS=0 -D DSP_SIGNEDONLY -D DSP_A_MAXWIDTH=32 -D DSP_B_MAXWIDTH=18 -D DSP_A_MINWIDTH=10 -D DSP_B_MINWIDTH=10 -D DSP_NAME=$__MUL32X18
 chtype -set $mul t:$__soft_mul
 techmap -map +/mul2dsp.v -map +/quicklogic/qlf_k6n10f/dspv2_map.v -D USE_DSP_CFG_PARAMS=0 -D DSP_SIGNEDONLY -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=9 -D DSP_A_MINWIDTH=4 -D DSP_B_MINWIDTH=4 -D DSP_NAME=$__MUL16X9
-# TODO is this missing from synth_quicklogic?
 read_verilog -lib +/quicklogic/qlf_k6n10f/dspv2_sim.v
 select -assert-count 2 t:dspv2_16x9x32_cfg_ports
 select -assert-count 0 t:dspv2_32x18x64_cfg_ports