mirror of https://github.com/YosysHQ/yosys.git
missed a few pf instances
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c385421c17
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@ -45,7 +45,7 @@ struct SynthMicrochipPass : public ScriptPass {
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log(" Run synthesis for the specified Microchip architecture. \n");
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log(" Run synthesis for the specified Microchip architecture. \n");
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log(" Generate the synthesis netlist for the specified family.\n");
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log(" Generate the synthesis netlist for the specified family.\n");
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log(" supported values:\n");
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log(" supported values:\n");
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log(" - pf: PolarFire\n");
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log(" - polarfire: PolarFire\n");
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log("\n");
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log("\n");
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log(" -edif <file>\n");
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log(" -edif <file>\n");
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log(" Write the design to the specified edif file. Writing of an output file\n");
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log(" Write the design to the specified edif file. Writing of an output file\n");
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@ -112,7 +112,7 @@ struct SynthMicrochipPass : public ScriptPass {
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top_opt = "-auto-top";
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top_opt = "-auto-top";
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edif_file.clear();
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edif_file.clear();
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blif_file.clear();
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blif_file.clear();
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family = "pf";
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family = "polarfire";
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flatten = false;
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flatten = false;
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retime = false;
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retime = false;
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noiopad = false;
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noiopad = false;
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@ -286,8 +286,8 @@ struct SynthMicrochipPass : public ScriptPass {
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run("memory_dff"); // microchip_dsp will merge registers, reserve memory port registers first
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run("memory_dff"); // microchip_dsp will merge registers, reserve memory port registers first
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if (help_mode)
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if (help_mode)
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run("techmap -map +/mul2dsp.v -map +/microchip/{family}_dsp_map.v {options}");
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run("techmap -map +/mul2dsp.v -map +/microchip/{family}_dsp_map.v {options}");
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else if (family == "pf") // Microchip - map multipliers to DSP
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else if (family == "polarfire") // Microchip - map multipliers to DSP
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run("techmap -map +/mul2dsp.v -map +/microchip/pf_dsp_map.v -D DSP_A_MAXWIDTH=18 -D DSP_B_MAXWIDTH=18 "
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run("techmap -map +/mul2dsp.v -map +/microchip/polarfire_dsp_map.v -D DSP_A_MAXWIDTH=18 -D DSP_B_MAXWIDTH=18 "
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"-D DSP_A_MAXWIDTH_PARTIAL=18 " // Partial multipliers are intentionally
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"-D DSP_A_MAXWIDTH_PARTIAL=18 " // Partial multipliers are intentionally
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// limited to 18x18 in order to take
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// limited to 18x18 in order to take
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// advantage of the (PCOUT >> 17) -> PCIN
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// advantage of the (PCOUT >> 17) -> PCIN
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@ -303,7 +303,7 @@ struct SynthMicrochipPass : public ScriptPass {
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run("select -clear");
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run("select -clear");
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if (help_mode)
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if (help_mode)
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run("microchip_dsp -family <family>");
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run("microchip_dsp -family <family>");
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else if (family == "pf") // Microchip - absorb cells into DSP
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else if (family == "polarfire") // Microchip - absorb cells into DSP
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run("microchip_dsp -family " + family);
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run("microchip_dsp -family " + family);
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run("chtype -set $mul t:$__soft_mul");
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run("chtype -set $mul t:$__soft_mul");
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@ -329,7 +329,7 @@ struct SynthMicrochipPass : public ScriptPass {
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params = " [...]";
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params = " [...]";
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} else {
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} else {
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if (family == "pf") {
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if (family == "polarfire") {
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// cost of a single bit for memory lowered to soft logic
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// cost of a single bit for memory lowered to soft logic
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params += " -logic-cost-rom 0.015625";
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params += " -logic-cost-rom 0.015625";
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@ -452,7 +452,7 @@ struct SynthMicrochipPass : public ScriptPass {
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// $_DLATCH_[NP][NP][01]_ (D-latch + reset to 0/1)
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// $_DLATCH_[NP][NP][01]_ (D-latch + reset to 0/1)
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// $_DLATCHSR_[NP][NP][NP]_ (D-latch + set + reset)
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// $_DLATCHSR_[NP][NP][NP]_ (D-latch + set + reset)
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if (family == "pf") {
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if (family == "polarfire") {
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std::string params = "";
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std::string params = "";
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// D-flop with async reset and enable
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// D-flop with async reset and enable
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