mirror of https://github.com/YosysHQ/yosys.git
cxxrtl: only write VCD values that were actually updated.
On a representative design (Minerva SoC) this reduces VCD file size by ~20× and runtime by ~3×.
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parent
9c36102669
commit
68362a9053
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@ -28,10 +28,12 @@ class vcd_writer {
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size_t ident;
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size_t width;
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chunk_t *curr;
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size_t prev_off;
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};
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std::vector<std::string> current_scope;
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std::vector<variable> variables;
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std::vector<chunk_t> cache;
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bool streaming = false;
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void emit_timescale(unsigned number, const std::string &unit) {
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@ -101,6 +103,22 @@ class vcd_writer {
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buffer += '\n';
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}
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void append_variable(size_t width, chunk_t *curr) {
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const size_t chunks = (width + (sizeof(chunk_t) * 8 - 1)) / (sizeof(chunk_t) * 8);
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variables.emplace_back(variable { variables.size(), width, curr, cache.size() });
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cache.insert(cache.end(), &curr[0], &curr[chunks]);
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}
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bool test_variable(const variable &var) {
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const size_t chunks = (var.width + (sizeof(chunk_t) * 8 - 1)) / (sizeof(chunk_t) * 8);
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if (std::equal(&var.curr[0], &var.curr[chunks], &cache[var.prev_off])) {
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return false;
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} else {
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std::copy(&var.curr[0], &var.curr[chunks], &cache[var.prev_off]);
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return true;
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}
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}
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static std::vector<std::string> split_hierarchy(const std::string &hier_name) {
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std::vector<std::string> hierarchy;
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size_t prev = 0;
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@ -133,11 +151,11 @@ public:
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switch (item.type) {
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// Not the best naming but oh well...
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case debug_item::VALUE:
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variables.emplace_back(variable { variables.size(), item.width, item.curr });
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append_variable(item.width, item.curr);
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emit_var(variables.back(), "wire", name);
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break;
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case debug_item::WIRE:
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variables.emplace_back(variable { variables.size(), item.width, item.curr });
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append_variable(item.width, item.curr);
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emit_var(variables.back(), "reg", name);
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break;
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case debug_item::MEMORY: {
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@ -145,7 +163,7 @@ public:
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for (size_t index = 0; index < item.depth; index++) {
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chunk_t *nth_curr = &item.curr[stride * index];
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std::string nth_name = name + '[' + std::to_string(index) + ']';
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variables.emplace_back(variable { variables.size(), item.width, nth_curr });
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append_variable(item.width, nth_curr);
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emit_var(variables.back(), "reg", nth_name);
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}
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break;
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@ -175,17 +193,19 @@ public:
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}
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void sample(uint64_t timestamp) {
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if (!streaming) {
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bool first_sample = !streaming;
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if (first_sample) {
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emit_scope({});
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emit_enddefinitions();
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}
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emit_time(timestamp);
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for (auto var : variables) {
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if (var.width == 1)
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emit_scalar(var);
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else
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emit_vector(var);
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}
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for (auto var : variables)
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if (test_variable(var) || first_sample) {
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if (var.width == 1)
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emit_scalar(var);
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else
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emit_vector(var);
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}
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}
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};
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