mirror of https://github.com/YosysHQ/yosys.git
Removed commented out debug code
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@ -42,10 +42,6 @@ struct OptRmportsPass : public Pass {
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virtual void execute(std::vector<std::string> /*args*/, RTLIL::Design *design)
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{
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log_header(design, "Executing OPT_RMPORTS pass (remove top level ports with no connections).\n");
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//vector<RTLIL::Module*> mods = design->modules();
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//for(auto mod : mods)
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// ProcessModule(mod);
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ProcessModule(design->top_module());
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}
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