From 64eb8f29adcc3e6ee92e083ae0fee3aaf85dbbc4 Mon Sep 17 00:00:00 2001
From: Udi Finkelstein <github@udifink.com>
Date: Tue, 26 Sep 2017 06:25:42 +0300
Subject: [PATCH 1/6] Add $size() function. At the moment it works only on
 expressions, not on memories.

---
 frontends/ast/simplify.cc   | 14 ++++++++++++++
 tests/simple/functions01.sv | 15 +++++++++++++++
 2 files changed, 29 insertions(+)
 create mode 100644 tests/simple/functions01.sv

diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index 28c9945ab..541fe1b18 100644
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -1870,6 +1870,20 @@ skip_dynamic_range_lvalue_expansion:;
 				goto apply_newNode;
 			}
 
+			if (str == "\\$size")
+			{
+				if (children.size() != 1)
+					log_error("System function %s got %d arguments, expected 1 at %s:%d.\n",
+							RTLIL::unescape_id(str).c_str(), int(children.size()), filename.c_str(), linenum);
+
+				AstNode *buf = children[0]->clone();
+				buf->detectSignWidth(width_hint, sign_hint);
+				delete buf;
+
+				newNode = mkconst_int(width_hint, false);
+				goto apply_newNode;
+			}
+
 			if (str == "\\$ln" || str == "\\$log10" || str == "\\$exp" || str == "\\$sqrt" || str == "\\$pow" ||
 					str == "\\$floor" || str == "\\$ceil" || str == "\\$sin" || str == "\\$cos" || str == "\\$tan" ||
 					str == "\\$asin" || str == "\\$acos" || str == "\\$atan" || str == "\\$atan2" || str == "\\$hypot" ||
diff --git a/tests/simple/functions01.sv b/tests/simple/functions01.sv
new file mode 100644
index 000000000..0fa1da6bd
--- /dev/null
+++ b/tests/simple/functions01.sv
@@ -0,0 +1,15 @@
+module functions01;
+wire [3:0]x;
+wire [$size(x)-1:0]x_size;
+wire [$size({x, x})-1:0]xx_size;
+wire [3:0]w[0:5];
+
+//
+// The following are not supported yet:
+//
+
+//wire [$size(w)-1:0]w_s;
+//wire [$bits(x)-1:0]x_bits;
+//wire [$bits({x, x})-1:0]xx_bits;
+
+endmodule

From 17f8b4160574d34c446782952f09f940cd66c290 Mon Sep 17 00:00:00 2001
From: Udi Finkelstein <github@udifink.com>
Date: Tue, 26 Sep 2017 08:36:45 +0300
Subject: [PATCH 2/6] $size() now works with memories as well!

---
 frontends/ast/simplify.cc   | 4 +++-
 tests/simple/functions01.sv | 6 ++++--
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index 541fe1b18..608df0cb9 100644
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -387,7 +387,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
 		}
 		for (size_t i = 0; i < children.size(); i++) {
 			AstNode *node = children[i];
-			if (node->type == AST_PARAMETER || node->type == AST_LOCALPARAM || node->type == AST_WIRE || node->type == AST_AUTOWIRE)
+			if (node->type == AST_PARAMETER || node->type == AST_LOCALPARAM || node->type == AST_WIRE || node->type == AST_AUTOWIRE || node->type == AST_MEMORY)
 				while (node->simplify(true, false, false, 1, -1, false, node->type == AST_PARAMETER || node->type == AST_LOCALPARAM))
 					did_something = true;
 		}
@@ -1877,6 +1877,8 @@ skip_dynamic_range_lvalue_expansion:;
 							RTLIL::unescape_id(str).c_str(), int(children.size()), filename.c_str(), linenum);
 
 				AstNode *buf = children[0]->clone();
+				// Is this needed?
+				//while (buf->simplify(true, false, false, stage, width_hint, sign_hint, false)) { }
 				buf->detectSignWidth(width_hint, sign_hint);
 				delete buf;
 
diff --git a/tests/simple/functions01.sv b/tests/simple/functions01.sv
index 0fa1da6bd..cd87a49b7 100644
--- a/tests/simple/functions01.sv
+++ b/tests/simple/functions01.sv
@@ -2,13 +2,15 @@ module functions01;
 wire [3:0]x;
 wire [$size(x)-1:0]x_size;
 wire [$size({x, x})-1:0]xx_size;
-wire [3:0]w[0:5];
+wire [3:0]y[0:5];
+wire [$size(y)-1:0]y_size;
+wire [3:0]z[0:5][0:7];
+wire [$size(z)-1:0]z_size;
 
 //
 // The following are not supported yet:
 //
 
-//wire [$size(w)-1:0]w_s;
 //wire [$bits(x)-1:0]x_bits;
 //wire [$bits({x, x})-1:0]xx_bits;
 

From 2dea42e9039cdf47ca4927f62c69c6ae7ac2e399 Mon Sep 17 00:00:00 2001
From: Udi Finkelstein <github@udifink.com>
Date: Tue, 26 Sep 2017 09:11:25 +0300
Subject: [PATCH 3/6] Added $bits() for memories as well.

---
 frontends/ast/simplify.cc   | 28 ++++++++++++++++++++++++++--
 tests/simple/functions01.sv | 11 +++++------
 2 files changed, 31 insertions(+), 8 deletions(-)

diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index 608df0cb9..0cde34dc5 100644
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -1870,19 +1870,43 @@ skip_dynamic_range_lvalue_expansion:;
 				goto apply_newNode;
 			}
 
-			if (str == "\\$size")
+			if (str == "\\$size" || str == "\\$bits")
 			{
 				if (children.size() != 1)
 					log_error("System function %s got %d arguments, expected 1 at %s:%d.\n",
 							RTLIL::unescape_id(str).c_str(), int(children.size()), filename.c_str(), linenum);
 
 				AstNode *buf = children[0]->clone();
+				int mem_depth = 1;
+				AstNode *id_ast = NULL;
+				
 				// Is this needed?
 				//while (buf->simplify(true, false, false, stage, width_hint, sign_hint, false)) { }
 				buf->detectSignWidth(width_hint, sign_hint);
+				if (str == "\\$bits") {
+					if (buf->type == AST_IDENTIFIER) {
+						id_ast = buf->id2ast;
+						if (id_ast == NULL && current_scope.count(buf->str))
+							id_ast = current_scope.at(buf->str);
+						if (!id_ast)
+							log_error("Failed to resolve identifier %s for width detection at %s:%d!\n", buf->str.c_str(), filename.c_str(), linenum);
+						if (id_ast->type == AST_MEMORY) {
+							AstNode *mem_range = id_ast->children[1];
+							if (mem_range->type == AST_RANGE) {
+								if (!mem_range->range_valid)
+									log_error("Failed to detect width of memory access `%s' at %s:%d!\n", mem_range->str.c_str(), filename.c_str(), linenum);
+								mem_depth = mem_range->range_left - mem_range->range_right + 1;
+							} else if (mem_range->type == AST_MULTIRANGE) {
+								for (auto n : mem_range->children) 
+									mem_depth *= (n->range_left - n->range_right + 1);
+							} else
+								log_error("Unknown memory depth AST type in `%s' at %s:%d!\n", mem_range->str.c_str(), filename.c_str(), linenum);
+						}
+					}
+				}
 				delete buf;
 
-				newNode = mkconst_int(width_hint, false);
+				newNode = mkconst_int(width_hint * mem_depth, false);
 				goto apply_newNode;
 			}
 
diff --git a/tests/simple/functions01.sv b/tests/simple/functions01.sv
index cd87a49b7..d6cd53e07 100644
--- a/tests/simple/functions01.sv
+++ b/tests/simple/functions01.sv
@@ -1,4 +1,5 @@
 module functions01;
+
 wire [3:0]x;
 wire [$size(x)-1:0]x_size;
 wire [$size({x, x})-1:0]xx_size;
@@ -7,11 +8,9 @@ wire [$size(y)-1:0]y_size;
 wire [3:0]z[0:5][0:7];
 wire [$size(z)-1:0]z_size;
 
-//
-// The following are not supported yet:
-//
-
-//wire [$bits(x)-1:0]x_bits;
-//wire [$bits({x, x})-1:0]xx_bits;
+wire [$bits(x)-1:0]x_bits;
+wire [$bits({x, x})-1:0]xx_bits;
+wire [$bits(y)-1:0]y_bits;
+wire [$bits(z)-1:0]z_bits;
 
 endmodule

From 7e391ba90438ba1c20c29863d1556cb6bfd1ea29 Mon Sep 17 00:00:00 2001
From: Udi Finkelstein <github@udifink.com>
Date: Tue, 26 Sep 2017 09:19:56 +0300
Subject: [PATCH 4/6] enable $bits() and $size() functions only when the
 SystemVerilog flag is enabled for read_verilog

---
 frontends/ast/simplify.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index 0cde34dc5..5b7e48361 100644
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -1870,7 +1870,7 @@ skip_dynamic_range_lvalue_expansion:;
 				goto apply_newNode;
 			}
 
-			if (str == "\\$size" || str == "\\$bits")
+			if (VERILOG_FRONTEND::sv_mode && (str == "\\$size" || str == "\\$bits"))
 			{
 				if (children.size() != 1)
 					log_error("System function %s got %d arguments, expected 1 at %s:%d.\n",

From 6ddc6a7af42d371aa7c08505d82b30628372a16c Mon Sep 17 00:00:00 2001
From: Udi Finkelstein <github@udifink.com>
Date: Tue, 26 Sep 2017 19:18:25 +0300
Subject: [PATCH 5/6] $size() seems to work now with or without the optional
 parameter. Multidimensional arrays still don't work. I suspect the problem is
 that the array is flattened into a 1D array before $size() is evaluated.

---
 frontends/ast/simplify.cc   | 50 +++++++++++++++++++++++++++++--------
 tests/simple/functions01.sv | 26 +++++++++++++------
 2 files changed, 58 insertions(+), 18 deletions(-)

diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index 5b7e48361..a87fccbe9 100644
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -1872,26 +1872,39 @@ skip_dynamic_range_lvalue_expansion:;
 
 			if (VERILOG_FRONTEND::sv_mode && (str == "\\$size" || str == "\\$bits"))
 			{
-				if (children.size() != 1)
+				if (str == "\\$bits" && children.size() != 1)
 					log_error("System function %s got %d arguments, expected 1 at %s:%d.\n",
 							RTLIL::unescape_id(str).c_str(), int(children.size()), filename.c_str(), linenum);
 
+				if (str == "\\$size" && children.size() != 1 && children.size() != 2)
+					log_error("System function %s got %d arguments, expected 1 or 2 at %s:%d.\n",
+							RTLIL::unescape_id(str).c_str(), int(children.size()), filename.c_str(), linenum);
+
+				int dim = 1;
+				if (str == "\\$size" && children.size() == 2) {
+					AstNode *buf = children[1]->clone();
+					dim = buf->asInt(false);
+					delete buf;
+				}
 				AstNode *buf = children[0]->clone();
 				int mem_depth = 1;
 				AstNode *id_ast = NULL;
 				
+
 				// Is this needed?
 				//while (buf->simplify(true, false, false, stage, width_hint, sign_hint, false)) { }
 				buf->detectSignWidth(width_hint, sign_hint);
-				if (str == "\\$bits") {
-					if (buf->type == AST_IDENTIFIER) {
-						id_ast = buf->id2ast;
-						if (id_ast == NULL && current_scope.count(buf->str))
-							id_ast = current_scope.at(buf->str);
-						if (!id_ast)
-							log_error("Failed to resolve identifier %s for width detection at %s:%d!\n", buf->str.c_str(), filename.c_str(), linenum);
-						if (id_ast->type == AST_MEMORY) {
-							AstNode *mem_range = id_ast->children[1];
+				if (buf->type == AST_IDENTIFIER) {
+					id_ast = buf->id2ast;
+					if (id_ast == NULL && current_scope.count(buf->str))
+						id_ast = current_scope.at(buf->str);
+					if (!id_ast)
+						log_error("Failed to resolve identifier %s for width detection at %s:%d!\n", buf->str.c_str(), filename.c_str(), linenum);
+					if (id_ast->type == AST_MEMORY) {
+						// We got here only if the argument is a memory
+						// Otherwise $size() and $bits() return the expression width
+						AstNode *mem_range = id_ast->children[1];
+						if (str == "\\$bits") {
 							if (mem_range->type == AST_RANGE) {
 								if (!mem_range->range_valid)
 									log_error("Failed to detect width of memory access `%s' at %s:%d!\n", mem_range->str.c_str(), filename.c_str(), linenum);
@@ -1901,6 +1914,23 @@ skip_dynamic_range_lvalue_expansion:;
 									mem_depth *= (n->range_left - n->range_right + 1);
 							} else
 								log_error("Unknown memory depth AST type in `%s' at %s:%d!\n", mem_range->str.c_str(), filename.c_str(), linenum);
+						} else {
+							// $size()
+							if (mem_range->type == AST_RANGE) {
+								if (!mem_range->range_valid)
+									log_error("Failed to detect width of memory access `%s' at %s:%d!\n", mem_range->str.c_str(), filename.c_str(), linenum);
+								if (dim == 1)
+									width_hint = mem_range->range_left - mem_range->range_right + 1;
+							} else if (mem_range->type == AST_MULTIRANGE) {
+								log("multirange!\n");
+								int s = mem_range->children.size();
+								if (dim <= s) {
+									auto n = mem_range->children[dim-1]; 
+									width_hint = (n->range_left - n->range_right + 1);
+								} else if (dim > s+1)
+									log_error("Dimension %d out of range in `%s', as it only has dimensions 1..%d at %s:%d!\n", dim, mem_range->str.c_str(), s+1, filename.c_str(), linenum);
+							} else
+								log_error("Unknown memory depth AST type in `%s' at %s:%d!\n", mem_range->str.c_str(), filename.c_str(), linenum);
 						}
 					}
 				}
diff --git a/tests/simple/functions01.sv b/tests/simple/functions01.sv
index d6cd53e07..e36d6a764 100644
--- a/tests/simple/functions01.sv
+++ b/tests/simple/functions01.sv
@@ -1,16 +1,26 @@
 module functions01;
 
 wire [3:0]x;
-wire [$size(x)-1:0]x_size;
-wire [$size({x, x})-1:0]xx_size;
 wire [3:0]y[0:5];
-wire [$size(y)-1:0]y_size;
 wire [3:0]z[0:5][0:7];
-wire [$size(z)-1:0]z_size;
 
-wire [$bits(x)-1:0]x_bits;
-wire [$bits({x, x})-1:0]xx_bits;
-wire [$bits(y)-1:0]y_bits;
-wire [$bits(z)-1:0]z_bits;
+//wire [$size(x)-1:0]x_size;
+//wire [$size({x, x})-1:0]xx_size;
+//wire [$size(y)-1:0]y_size;
+//wire [$size(z)-1:0]z_size;
+
+assert property ($size(x) == 4);
+assert property ($size({3{x}}) == 3*4);
+assert property ($size(y) == 6);
+assert property ($size(y, 1) == 6);
+assert property ($size(y, 2) == 4);
+
+//wire [$bits(x)-1:0]x_bits;
+//wire [$bits({x, x})-1:0]xx_bits;
+
+assert property ($bits(x) == 4);
+assert property ($bits(y) == 4*6);
+assert property ($bits(z) == 4*6*8);
+
 
 endmodule

From e951ac0dfba554a86331b0863f7bda81effef10d Mon Sep 17 00:00:00 2001
From: Udi Finkelstein <github@udifink.com>
Date: Tue, 26 Sep 2017 20:34:24 +0300
Subject: [PATCH 6/6] $size() now works correctly for all cases! It seems the
 issues was that AST_MULTIRANGE is converted into a multirange_dimensions[]
 array on the AST_MEMORY node directly.

---
 frontends/ast/simplify.cc   | 34 +++++++++++++++++-----------------
 tests/simple/functions01.sv | 16 +++++++++++-----
 2 files changed, 28 insertions(+), 22 deletions(-)

diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index a87fccbe9..678951850 100644
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -1883,17 +1883,19 @@ skip_dynamic_range_lvalue_expansion:;
 				int dim = 1;
 				if (str == "\\$size" && children.size() == 2) {
 					AstNode *buf = children[1]->clone();
+					// Evaluate constant expression
+					while (buf->simplify(true, false, false, stage, width_hint, sign_hint, false)) { }
 					dim = buf->asInt(false);
 					delete buf;
 				}
 				AstNode *buf = children[0]->clone();
 				int mem_depth = 1;
 				AstNode *id_ast = NULL;
-				
 
 				// Is this needed?
 				//while (buf->simplify(true, false, false, stage, width_hint, sign_hint, false)) { }
 				buf->detectSignWidth(width_hint, sign_hint);
+
 				if (buf->type == AST_IDENTIFIER) {
 					id_ast = buf->id2ast;
 					if (id_ast == NULL && current_scope.count(buf->str))
@@ -1907,30 +1909,28 @@ skip_dynamic_range_lvalue_expansion:;
 						if (str == "\\$bits") {
 							if (mem_range->type == AST_RANGE) {
 								if (!mem_range->range_valid)
-									log_error("Failed to detect width of memory access `%s' at %s:%d!\n", mem_range->str.c_str(), filename.c_str(), linenum);
+									log_error("Failed to detect width of memory access `%s' at %s:%d!\n", buf->str.c_str(), filename.c_str(), linenum);
 								mem_depth = mem_range->range_left - mem_range->range_right + 1;
-							} else if (mem_range->type == AST_MULTIRANGE) {
-								for (auto n : mem_range->children) 
-									mem_depth *= (n->range_left - n->range_right + 1);
 							} else
-								log_error("Unknown memory depth AST type in `%s' at %s:%d!\n", mem_range->str.c_str(), filename.c_str(), linenum);
+								log_error("Unknown memory depth AST type in `%s' at %s:%d!\n", buf->str.c_str(), filename.c_str(), linenum);
 						} else {
 							// $size()
 							if (mem_range->type == AST_RANGE) {
 								if (!mem_range->range_valid)
-									log_error("Failed to detect width of memory access `%s' at %s:%d!\n", mem_range->str.c_str(), filename.c_str(), linenum);
+									log_error("Failed to detect width of memory access `%s' at %s:%d!\n", buf->str.c_str(), filename.c_str(), linenum);
+								int dims;
+								if (id_ast->multirange_dimensions.empty())
+									dims = 1;
+								else
+									dims = GetSize(id_ast->multirange_dimensions)/2;
 								if (dim == 1)
-									width_hint = mem_range->range_left - mem_range->range_right + 1;
-							} else if (mem_range->type == AST_MULTIRANGE) {
-								log("multirange!\n");
-								int s = mem_range->children.size();
-								if (dim <= s) {
-									auto n = mem_range->children[dim-1]; 
-									width_hint = (n->range_left - n->range_right + 1);
-								} else if (dim > s+1)
-									log_error("Dimension %d out of range in `%s', as it only has dimensions 1..%d at %s:%d!\n", dim, mem_range->str.c_str(), s+1, filename.c_str(), linenum);
+									width_hint = (dims > 1) ? id_ast->multirange_dimensions[1] : (mem_range->range_left - mem_range->range_right + 1);
+								else if (dim <= dims) {
+									width_hint = id_ast->multirange_dimensions[2*dim-1];
+								} else if ((dim > dims+1) || (dim < 0))
+									log_error("Dimension %d out of range in `%s', as it only has dimensions 1..%d at %s:%d!\n", dim, buf->str.c_str(), dims+1, filename.c_str(), linenum);
 							} else
-								log_error("Unknown memory depth AST type in `%s' at %s:%d!\n", mem_range->str.c_str(), filename.c_str(), linenum);
+								log_error("Unknown memory depth AST type in `%s' at %s:%d!\n", buf->str.c_str(), filename.c_str(), linenum);
 						}
 					}
 				}
diff --git a/tests/simple/functions01.sv b/tests/simple/functions01.sv
index e36d6a764..d7ce2326e 100644
--- a/tests/simple/functions01.sv
+++ b/tests/simple/functions01.sv
@@ -1,8 +1,8 @@
 module functions01;
 
-wire [3:0]x;
-wire [3:0]y[0:5];
-wire [3:0]z[0:5][0:7];
+wire [5:2]x;
+wire [3:0]y[2:7];
+wire [3:0]z[7:2][2:9];
 
 //wire [$size(x)-1:0]x_size;
 //wire [$size({x, x})-1:0]xx_size;
@@ -13,7 +13,14 @@ assert property ($size(x) == 4);
 assert property ($size({3{x}}) == 3*4);
 assert property ($size(y) == 6);
 assert property ($size(y, 1) == 6);
-assert property ($size(y, 2) == 4);
+assert property ($size(y, (1+1)) == 4);
+
+assert property ($size(z) == 6);
+assert property ($size(z, 1) == 6);
+assert property ($size(z, 2) == 8);
+assert property ($size(z, 3) == 4);
+// This should trigger an error if enabled (it does).
+//assert property ($size(z, 4) == 4);
 
 //wire [$bits(x)-1:0]x_bits;
 //wire [$bits({x, x})-1:0]xx_bits;
@@ -22,5 +29,4 @@ assert property ($bits(x) == 4);
 assert property ($bits(y) == 4*6);
 assert property ($bits(z) == 4*6*8);
 
-
 endmodule