mirror of https://github.com/YosysHQ/yosys.git
Undef-related fixes in simlib $alu model
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@ -492,8 +492,11 @@ generate
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end
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endgenerate
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// this is 'x' if Y and CO should be all 'x', and '0' otherwise
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wire y_co_undef = ^{A, A, B, B, CI, CI, BI, BI};
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assign X = AA ^ BB;
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assign Y = AA + BB + CI;
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assign Y = (AA + BB + CI) ^ {Y_WIDTH{y_co_undef}};
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function get_carry;
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input a, b, c;
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@ -502,9 +505,9 @@ endfunction
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genvar i;
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generate
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assign CO[0] = get_carry(AA[0], BB[0], CI);
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assign CO[0] = get_carry(AA[0], BB[0], CI) ^ y_co_undef;
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for (i = 1; i < Y_WIDTH; i = i+1) begin:BLOCK3
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assign CO[i] = get_carry(AA[i], BB[i], CO[i-1]);
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assign CO[i] = get_carry(AA[i], BB[i], CO[i-1]) ^ y_co_undef;
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end
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endgenerate
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