mirror of https://github.com/YosysHQ/yosys.git
Merge pull request #884 from zachjs/master
fix local name resolution in prefix constructs
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61f37706f9
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@ -2863,7 +2863,11 @@ void AstNode::expand_genblock(std::string index_var, std::string prefix, std::ma
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for (size_t i = 0; i < children.size(); i++) {
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AstNode *child = children[i];
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if (child->type != AST_FUNCTION && child->type != AST_TASK && child->type != AST_PREFIX)
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// AST_PREFIX member names should not be prefixed; a nested AST_PREFIX
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// still needs to recursed-into
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if (type == AST_PREFIX && i == 1 && child->type == AST_IDENTIFIER)
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continue;
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if (child->type != AST_FUNCTION && child->type != AST_TASK)
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child->expand_genblock(index_var, prefix, name_map);
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}
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@ -90,5 +90,61 @@ generate
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endcase
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end
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endgenerate
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endmodule
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// ------------------------------------------
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module gen_test4(a, b);
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input [3:0] a;
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output [3:0] b;
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genvar i;
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generate
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for (i=0; i < 3; i=i+1) begin : foo
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localparam PREV = i - 1;
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wire temp;
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if (i == 0)
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assign temp = a[0];
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else
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assign temp = foo[PREV].temp & a[i];
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assign b[i] = temp;
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end
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endgenerate
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endmodule
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// ------------------------------------------
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module gen_test5(input_bits, out);
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parameter WIDTH = 256;
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parameter CHUNK = 4;
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input [WIDTH-1:0] input_bits;
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output out;
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genvar step, i, j;
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generate
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for (step = 1; step <= WIDTH; step = step * CHUNK) begin : steps
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localparam PREV = step / CHUNK;
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localparam DIM = WIDTH / step;
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for (i = 0; i < DIM; i = i + 1) begin : outer
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localparam LAST_START = i * CHUNK;
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for (j = 0; j < CHUNK; j = j + 1) begin : inner
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wire temp;
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if (step == 1)
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assign temp = input_bits[i];
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else if (j == 0)
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assign temp = steps[PREV].outer[LAST_START].val;
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else
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assign temp
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= steps[step].outer[i].inner[j-1].temp
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& steps[PREV].outer[LAST_START + j].val;
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end
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wire val;
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assign val = steps[step].outer[i].inner[CHUNK - 1].temp;
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end
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end
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endgenerate
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assign out = steps[WIDTH].outer[0].val;
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endmodule
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