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Moved GP_POR out of digital cells b/c it has delays

This commit is contained in:
Andrew Zonenberg 2017-08-06 08:40:23 -07:00
parent f55d4cc2fd
commit 60dd5dba7b
2 changed files with 21 additions and 21 deletions
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21
techlibs/greenpak4/cells_sim_ams.v
View File

@ -87,3 +87,24 @@ module GP_VREF(input VIN, output reg VOUT);
parameter VREF = 0;
//cannot simulate mixed signal IP
endmodule
module GP_POR(output reg RST_DONE);
parameter POR_TIME = 500;
initial begin
RST_DONE = 0;
if(POR_TIME == 4)
#4000;
else if(POR_TIME == 500)
#500000;
else begin
$display("ERROR: bad POR_TIME for GP_POR cell");
$finish;
end
RST_DONE = 1;
end
endmodule

21
techlibs/greenpak4/cells_sim_digital.v
View File

@ -378,27 +378,6 @@ module GP_PGEN(input wire nRST, input wire CLK, output reg OUT);
endmodule
module GP_POR(output reg RST_DONE);
parameter POR_TIME = 500;
initial begin
RST_DONE = 0;
if(POR_TIME == 4)
#4000;
else if(POR_TIME == 500)
#500000;
else begin
$display("ERROR: bad POR_TIME for GP_POR cell");
$finish;
end
RST_DONE = 1;
end
endmodule
module GP_SHREG(input nRST, input CLK, input IN, output OUTA, output OUTB);
parameter OUTA_TAP = 1;