mirror of https://github.com/YosysHQ/yosys.git
do not leave NX_RAM empty to prevent removing it
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parent
4cb8e62626
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@ -29,4 +29,16 @@ input [12:0] PORT_B_ADDR;
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input [PORT_B_WIDTH-1:0] PORT_B_WR_DATA;
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input [PORT_B_WIDTH-1:0] PORT_B_WR_DATA;
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output [PORT_B_WIDTH-1:0] PORT_B_RD_DATA;
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output [PORT_B_WIDTH-1:0] PORT_B_RD_DATA;
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NX_RAM_WRAP #(
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) _TECHMAP_REPLACE_ (
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.ACK(PORT_A_CLK),
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.AA(PORT_A_ADDR),
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.AI(PORT_A_WR_DATA),
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.AO(PORT_A_RD_DATA),
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.BCK(PORT_B_CLK),
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.BA(PORT_B_ADDR),
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.BI(PORT_B_WR_DATA),
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.BO(PORT_B_RD_DATA)
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);
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endmodule
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endmodule
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@ -264,6 +264,7 @@ struct SynthNanoXplorePass : public ScriptPass
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args += " [-no-auto-block] [-no-auto-distributed]";
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args += " [-no-auto-block] [-no-auto-distributed]";
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run("memory_libmap -lib +/nanoxplore/rf_rams"+ postfix + ".txt -lib +/nanoxplore/brams.txt" + args, "(-no-auto-block if -nobram, -no-auto-distributed if -norfram)");
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run("memory_libmap -lib +/nanoxplore/rf_rams"+ postfix + ".txt -lib +/nanoxplore/brams.txt" + args, "(-no-auto-block if -nobram, -no-auto-distributed if -norfram)");
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run("techmap -map +/nanoxplore/rf_rams_map"+ postfix + ".v -map +/nanoxplore/brams_map.v");
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run("techmap -map +/nanoxplore/rf_rams_map"+ postfix + ".v -map +/nanoxplore/brams_map.v");
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run("techmap -map +/nanoxplore/cells_wrap.v t:NX_RAM*");
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run("techmap -map +/nanoxplore/cells_wrap" + postfix + ".v t:NX_XRFB* t:NX_RFB*");
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run("techmap -map +/nanoxplore/cells_wrap" + postfix + ".v t:NX_XRFB* t:NX_RFB*");
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}
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}
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