From 60405939943cd812e146b84848be8bc9307702db Mon Sep 17 00:00:00 2001 From: Alberto Gonzalez Date: Fri, 27 Mar 2020 09:46:40 +0000 Subject: [PATCH] Revert over-aggressive change to a more modest cleanup. --- frontends/ast/ast.cc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc index 57d51fbba..46801d691 100644 --- a/frontends/ast/ast.cc +++ b/frontends/ast/ast.cc @@ -1456,10 +1456,12 @@ RTLIL::IdString AstModule::derive(RTLIL::Design *design, dictmodule(modname); // Now that the interfaces have been exploded, we can delete the dummy port related to every interface. - pool to_remove; for(auto &intf : interfaces) { if(mod->wire(intf.first) != nullptr) { + pool to_remove; to_remove.insert(mod->wire(intf.first)); + mod->remove(to_remove); + mod->fixup_ports(); // We copy the cell of the interface to the sub-module such that it can further be found if it is propagated // down to sub-sub-modules etc. RTLIL::Cell * new_subcell = mod->addCell(intf.first, intf.second->name); @@ -1469,7 +1471,6 @@ RTLIL::IdString AstModule::derive(RTLIL::Design *design, dictremove(to_remove); mod->fixup_ports(); // If any interfaces were replaced, set the attribute 'interfaces_replaced_in_module':