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Merge pull request #3108 from YosysHQ/claire/verificdefs 

Add YOSYS to the implicitly defined verilog macros in verific
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Claire Xen 2021-12-13 22:03:29 +01:00 committed by GitHub
parent 19a38222e7 313340aed5
commit 5e5c8a54ce
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1 changed files with 2 additions and 1 deletions
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frontends/verific/verific.cc
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@ -2295,7 +2295,7 @@ struct VerificPass : public Pass {
log("\n");
log("Additional -D<macro>[=<value>] options may be added after the option indicating\n");
log("the language version (and before file names) to set additional verilog defines.\n");
log("The macros SYNTHESIS and VERIFIC are defined implicitly.\n");
log("The macros YOSYS, SYNTHESIS, and VERIFIC are defined implicitly.\n");
log("\n");
log("\n");
log(" verific -formal <verilog-file>..\n");
@ -2713,6 +2713,7 @@ struct VerificPass : public Pass {
else
log_abort();
veri_file::DefineMacro("YOSYS");
veri_file::DefineMacro("VERIFIC");
veri_file::DefineMacro(args[argidx] == "-formal" ? "FORMAL" : "SYNTHESIS");