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Replace `std::map` with `dict` for `connbits_map`, `cell_to_inbit`, and `outbit_to_cell`.

This commit is contained in:
Alberto Gonzalez 2020-04-19 22:38:10 +00:00
parent c43017fc08
commit 5cb4ae4666
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GPG Key ID: 8395A8BA109708B2
1 changed files with 3 additions and 3 deletions
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6
passes/techmap/techmap.cc
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@ -101,7 +101,7 @@ struct TechmapWorker
std::string constmap_tpl_name(SigMap &sigmap, RTLIL::Module *tpl, RTLIL::Cell *cell, bool verbose) std::string constmap_tpl_name(SigMap &sigmap, RTLIL::Module *tpl, RTLIL::Cell *cell, bool verbose)
{ {
std::string constmap_info; std::string constmap_info;
std::map<RTLIL::SigBit, std::pair<IdString, int>> connbits_map; dict<RTLIL::SigBit, std::pair<IdString, int>> connbits_map;
for (auto conn : cell->connections()) for (auto conn : cell->connections())
for (int i = 0; i < GetSize(conn.second); i++) { for (int i = 0; i < GetSize(conn.second); i++) {
@ -490,8 +490,8 @@ struct TechmapWorker
} }
TopoSort<RTLIL::Cell*, IdString::compare_ptr_by_name<RTLIL::Cell>> cells; TopoSort<RTLIL::Cell*, IdString::compare_ptr_by_name<RTLIL::Cell>> cells;
std::map<RTLIL::Cell*, std::set<RTLIL::SigBit>> cell_to_inbit; dict<RTLIL::Cell*, std::set<RTLIL::SigBit>> cell_to_inbit;
std::map<RTLIL::SigBit, std::set<RTLIL::Cell*>> outbit_to_cell; dict<RTLIL::SigBit, std::set<RTLIL::Cell*>> outbit_to_cell;
for (auto cell : module->selected_cells()) for (auto cell : module->selected_cells())
{ {