mirror of https://github.com/YosysHQ/yosys.git
Merge pull request #1218 from ZirconiumX/synth_intel_iopads
intel: Make -noiopads the default
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commit
5c933e5110
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@ -61,8 +61,8 @@ struct SynthIntelPass : public ScriptPass {
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log(" from label is synonymous to 'begin', and empty to label is\n");
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log(" synonymous to the end of the command list.\n");
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log("\n");
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log(" -noiopads\n");
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log(" do not use IO pad cells in output netlist\n");
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log(" -iopads\n");
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log(" use IO pad cells in output netlist\n");
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log("\n");
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log(" -nobram\n");
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log(" do not use block RAM cells in output netlist\n");
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@ -79,7 +79,7 @@ struct SynthIntelPass : public ScriptPass {
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}
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string top_opt, family_opt, vout_file, blif_file;
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bool retime, flatten, nobram, noiopads;
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bool retime, flatten, nobram, iopads;
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void clear_flags() YS_OVERRIDE
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{
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@ -90,7 +90,7 @@ struct SynthIntelPass : public ScriptPass {
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retime = false;
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flatten = true;
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nobram = false;
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noiopads = false;
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iopads = false;
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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@ -125,8 +125,8 @@ struct SynthIntelPass : public ScriptPass {
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run_to = args[argidx].substr(pos + 1);
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continue;
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}
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if (args[argidx] == "-noiopads") {
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noiopads = true;
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if (args[argidx] == "-iopads") {
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iopads = true;
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continue;
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}
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if (args[argidx] == "-nobram") {
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@ -215,8 +215,8 @@ struct SynthIntelPass : public ScriptPass {
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}
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if (check_label("map_cells")) {
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if (!noiopads)
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run("iopadmap -bits -outpad $__outpad I:O -inpad $__inpad O:I", "(unless -noiopads)");
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if (iopads || help_mode)
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run("iopadmap -bits -outpad $__outpad I:O -inpad $__inpad O:I", "(if -iopads)");
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run(stringf("techmap -map +/intel/%s/cells_map.v", family_opt.c_str()));
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run("dffinit -highlow -ff dffeas q power_up");
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