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Further improve unused-detection for opt_clean driver-driver conflict warning 

Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
Clifford Wolf 2019-05-03 09:22:26 +02:00
parent f12e1155f1
commit 5c2c0b4bb2
1 changed files with 8 additions and 5 deletions
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13
passes/opt/opt_clean.cc
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@ -89,9 +89,12 @@ void rmunused_module_cells(Module *module, bool verbose)
dict<SigBit, pool<Cell*>> wire2driver; dict<SigBit, pool<Cell*>> wire2driver;
dict<SigBit, vector<string>> driver_driver_logs; dict<SigBit, vector<string>> driver_driver_logs;
SigMap raw_sigmap;
for (auto &it : module->connections_) { for (auto &it : module->connections_) {
for (auto raw_bit : it.second) for (int i = 0; i < GetSize(it.second); i++) {
used_raw_bits.insert(raw_bit); if (it.second[i].wire != nullptr)
raw_sigmap.add(it.first[i], it.second[i]);
}
} }
for (auto &it : module->cells_) { for (auto &it : module->cells_) {
@ -104,7 +107,7 @@ void rmunused_module_cells(Module *module, bool verbose)
continue; continue;
auto bit = sigmap(raw_bit); auto bit = sigmap(raw_bit);
if (bit.wire == nullptr) if (bit.wire == nullptr)
driver_driver_logs[raw_bit].push_back(stringf("Driver-driver conflict " driver_driver_logs[raw_sigmap(raw_bit)].push_back(stringf("Driver-driver conflict "
"for %s between cell %s.%s and constant %s in %s: Resolved using constant.", "for %s between cell %s.%s and constant %s in %s: Resolved using constant.",
log_signal(raw_bit), log_id(cell), log_id(it2.first), log_signal(bit), log_id(module))); log_signal(raw_bit), log_id(cell), log_id(it2.first), log_signal(bit), log_id(module)));
if (bit.wire != nullptr) if (bit.wire != nullptr)
@ -124,7 +127,7 @@ void rmunused_module_cells(Module *module, bool verbose)
for (auto c : wire2driver[bit]) for (auto c : wire2driver[bit])
queue.insert(c), unused.erase(c); queue.insert(c), unused.erase(c);
for (auto raw_bit : SigSpec(wire)) for (auto raw_bit : SigSpec(wire))
used_raw_bits.insert(raw_bit); used_raw_bits.insert(raw_sigmap(raw_bit));
} }
} }
@ -159,7 +162,7 @@ void rmunused_module_cells(Module *module, bool verbose)
for (auto &it2 : cell->connections()) { for (auto &it2 : cell->connections()) {
if (ct_all.cell_known(cell->type) && !ct_all.cell_input(cell->type, it2.first)) if (ct_all.cell_known(cell->type) && !ct_all.cell_input(cell->type, it2.first))
continue; continue;
for (auto raw_bit : it2.second) for (auto raw_bit : raw_sigmap(it2.second))
used_raw_bits.insert(raw_bit); used_raw_bits.insert(raw_bit);
} }
} }