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Accept real-valued delay values

This commit is contained in:
Clifford Wolf 2017-11-18 10:01:30 +01:00
parent a4195e83c7
commit 5b6e52118c
1 changed files with 1 additions and 0 deletions
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frontends/verilog/verilog_parser.y
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@ -359,6 +359,7 @@ package_body_stmt:
non_opt_delay:
'#' TOK_ID { delete $2; } |
'#' TOK_CONSTVAL { delete $2; } |
'#' TOK_REALVAL { delete $2; } |
'#' '(' expr ')' { delete $3; } |
'#' '(' expr ':' expr ':' expr ')' { delete $3; delete $5; delete $7; };