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Use (* techmap_autopurge *) to suppress techmap warnings

This commit is contained in:
Eddie Hung 2019-09-19 15:58:01 -07:00
parent c15a35db84
commit 595fb611a5
2 changed files with 99 additions and 94 deletions
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110
techlibs/xilinx/abc_map.v
View File

@ -22,11 +22,11 @@
module RAM32X1D ( module RAM32X1D (
output DPO, SPO, output DPO, SPO,
input D, (* techmap_autopurge *) input D,
input WCLK, (* techmap_autopurge *) input WCLK,
input WE, (* techmap_autopurge *) input WE,
input A0, A1, A2, A3, A4, (* techmap_autopurge *) input A0, A1, A2, A3, A4,
input DPRA0, DPRA1, DPRA2, DPRA3, DPRA4 (* techmap_autopurge *) input DPRA0, DPRA1, DPRA2, DPRA3, DPRA4
); );
parameter INIT = 32'h0; parameter INIT = 32'h0;
parameter IS_WCLK_INVERTED = 1'b0; parameter IS_WCLK_INVERTED = 1'b0;
@ -45,11 +45,11 @@ endmodule
module RAM64X1D ( module RAM64X1D (
output DPO, SPO, output DPO, SPO,
input D, (* techmap_autopurge *) input D,
input WCLK, (* techmap_autopurge *) input WCLK,
input WE, (* techmap_autopurge *) input WE,
input A0, A1, A2, A3, A4, A5, (* techmap_autopurge *) input A0, A1, A2, A3, A4, A5,
input DPRA0, DPRA1, DPRA2, DPRA3, DPRA4, DPRA5 (* techmap_autopurge *) input DPRA0, DPRA1, DPRA2, DPRA3, DPRA4, DPRA5
); );
parameter INIT = 64'h0; parameter INIT = 64'h0;
parameter IS_WCLK_INVERTED = 1'b0; parameter IS_WCLK_INVERTED = 1'b0;
@ -68,10 +68,10 @@ endmodule
module RAM128X1D ( module RAM128X1D (
output DPO, SPO, output DPO, SPO,
input D, (* techmap_autopurge *) input D,
input WCLK, (* techmap_autopurge *) input WCLK,
input WE, (* techmap_autopurge *) input WE,
input [6:0] A, DPRA (* techmap_autopurge *) input [6:0] A, DPRA
); );
parameter INIT = 128'h0; parameter INIT = 128'h0;
parameter IS_WCLK_INVERTED = 1'b0; parameter IS_WCLK_INVERTED = 1'b0;
@ -90,7 +90,7 @@ endmodule
module SRL16E ( module SRL16E (
output Q, output Q,
input A0, A1, A2, A3, CE, CLK, D (* techmap_autopurge *) input A0, A1, A2, A3, CE, CLK, D
); );
parameter [15:0] INIT = 16'h0000; parameter [15:0] INIT = 16'h0000;
parameter [0:0] IS_CLK_INVERTED = 1'b0; parameter [0:0] IS_CLK_INVERTED = 1'b0;
@ -107,8 +107,8 @@ endmodule
module SRLC32E ( module SRLC32E (
output Q, output Q,
output Q31, output Q31,
input [4:0] A, (* techmap_autopurge *) input [4:0] A,
input CE, CLK, D (* techmap_autopurge *) input CE, CLK, D
); );
parameter [31:0] INIT = 32'h00000000; parameter [31:0] INIT = 32'h00000000;
parameter [0:0] IS_CLK_INVERTED = 1'b0; parameter [0:0] IS_CLK_INVERTED = 1'b0;
@ -134,44 +134,44 @@ module DSP48E1 (
output PATTERNDETECT, output PATTERNDETECT,
output [47:0] PCOUT, output [47:0] PCOUT,
output UNDERFLOW, output UNDERFLOW,
input signed [29:0] A, (* techmap_autopurge *) input signed [29:0] A,
input [29:0] ACIN, (* techmap_autopurge *) input [29:0] ACIN,
input [3:0] ALUMODE, (* techmap_autopurge *) input [3:0] ALUMODE,
input signed [17:0] B, (* techmap_autopurge *) input signed [17:0] B,
input [17:0] BCIN, (* techmap_autopurge *) input [17:0] BCIN,
input [47:0] C, (* techmap_autopurge *) input [47:0] C,
input CARRYCASCIN, (* techmap_autopurge *) input CARRYCASCIN,
input CARRYIN, (* techmap_autopurge *) input CARRYIN,
input [2:0] CARRYINSEL, (* techmap_autopurge *) input [2:0] CARRYINSEL,
input CEA1, (* techmap_autopurge *) input CEA1,
input CEA2, (* techmap_autopurge *) input CEA2,
input CEAD, (* techmap_autopurge *) input CEAD,
input CEALUMODE, (* techmap_autopurge *) input CEALUMODE,
input CEB1, (* techmap_autopurge *) input CEB1,
input CEB2, (* techmap_autopurge *) input CEB2,
input CEC, (* techmap_autopurge *) input CEC,
input CECARRYIN, (* techmap_autopurge *) input CECARRYIN,
input CECTRL, (* techmap_autopurge *) input CECTRL,
input CED, (* techmap_autopurge *) input CED,
input CEINMODE, (* techmap_autopurge *) input CEINMODE,
input CEM, (* techmap_autopurge *) input CEM,
input CEP, (* techmap_autopurge *) input CEP,
input CLK, (* techmap_autopurge *) input CLK,
input [24:0] D, (* techmap_autopurge *) input [24:0] D,
input [4:0] INMODE, (* techmap_autopurge *) input [4:0] INMODE,
input MULTSIGNIN, (* techmap_autopurge *) input MULTSIGNIN,
input [6:0] OPMODE, (* techmap_autopurge *) input [6:0] OPMODE,
input [47:0] PCIN, (* techmap_autopurge *) input [47:0] PCIN,
input RSTA, (* techmap_autopurge *) input RSTA,
input RSTALLCARRYIN, (* techmap_autopurge *) input RSTALLCARRYIN,
input RSTALUMODE, (* techmap_autopurge *) input RSTALUMODE,
input RSTB, (* techmap_autopurge *) input RSTB,
input RSTC, (* techmap_autopurge *) input RSTC,
input RSTCTRL, (* techmap_autopurge *) input RSTCTRL,
input RSTD, (* techmap_autopurge *) input RSTD,
input RSTINMODE, (* techmap_autopurge *) input RSTINMODE,
input RSTM, (* techmap_autopurge *) input RSTM,
input RSTP (* techmap_autopurge *) input RSTP
); );
parameter integer ACASCREG = 1; parameter integer ACASCREG = 1;
parameter integer ADREG = 1; parameter integer ADREG = 1;

83
techlibs/xilinx/abc_unmap.v
View File

@ -31,7 +31,12 @@ module \$__ABC_DSP48E1_REG (input [47:0] I, output [47:0] O, output Q);
assign O = I; assign O = I;
endmodule endmodule
(* techmap_celltype = "$__ABC_DSP48E1_MULT_P_MUX $__ABC_DSP48E1_MULT_PCOUT_MUX $__ABC_DSP48E1_MULT_DPORT_P_MUX $__ABC_DSP48E1_MULT_DPORT_PCOUT_MUX $__ABC_DSP48E1_P_MUX $__ABC_DSP48E1_PCOUT_MUX" *) (* techmap_celltype = "$__ABC_DSP48E1_MULT_P_MUX $__ABC_DSP48E1_MULT_PCOUT_MUX $__ABC_DSP48E1_MULT_DPORT_P_MUX $__ABC_DSP48E1_MULT_DPORT_PCOUT_MUX $__ABC_DSP48E1_P_MUX $__ABC_DSP48E1_PCOUT_MUX" *)
module \$__ABC_DSP48E1_MUX (input Aq, Bq, Cq, Dq, ADq, Mq, input [47:0] P, input Pq, output [47:0] O); module \$__ABC_DSP48E1_MUX (
input Aq, Bq, Cq, Dq, ADq, Mq,
input [47:0] P,
input Pq,
output [47:0] O
);
assign O = P; assign O = P;
endmodule endmodule
@ -48,44 +53,44 @@ module \$__ABC_DSP48E1 (
output PATTERNDETECT, output PATTERNDETECT,
output [47:0] PCOUT, output [47:0] PCOUT,
output UNDERFLOW, output UNDERFLOW,
input signed [29:0] A, (* techmap_autopurge *) input signed [29:0] A,
input [29:0] ACIN, (* techmap_autopurge *) input [29:0] ACIN,
input [3:0] ALUMODE, (* techmap_autopurge *) input [3:0] ALUMODE,
input signed [17:0] B, (* techmap_autopurge *) input signed [17:0] B,
input [17:0] BCIN, (* techmap_autopurge *) input [17:0] BCIN,
input [47:0] C, (* techmap_autopurge *) input [47:0] C,
input CARRYCASCIN, (* techmap_autopurge *) input CARRYCASCIN,
input CARRYIN, (* techmap_autopurge *) input CARRYIN,
input [2:0] CARRYINSEL, (* techmap_autopurge *) input [2:0] CARRYINSEL,
input CEA1, (* techmap_autopurge *) input CEA1,
input CEA2, (* techmap_autopurge *) input CEA2,
input CEAD, (* techmap_autopurge *) input CEAD,
input CEALUMODE, (* techmap_autopurge *) input CEALUMODE,
input CEB1, (* techmap_autopurge *) input CEB1,
input CEB2, (* techmap_autopurge *) input CEB2,
input CEC, (* techmap_autopurge *) input CEC,
input CECARRYIN, (* techmap_autopurge *) input CECARRYIN,
input CECTRL, (* techmap_autopurge *) input CECTRL,
input CED, (* techmap_autopurge *) input CED,
input CEINMODE, (* techmap_autopurge *) input CEINMODE,
input CEM, (* techmap_autopurge *) input CEM,
input CEP, (* techmap_autopurge *) input CEP,
input CLK, (* techmap_autopurge *) input CLK,
input [24:0] D, (* techmap_autopurge *) input [24:0] D,
input [4:0] INMODE, (* techmap_autopurge *) input [4:0] INMODE,
input MULTSIGNIN, (* techmap_autopurge *) input MULTSIGNIN,
input [6:0] OPMODE, (* techmap_autopurge *) input [6:0] OPMODE,
input [47:0] PCIN, (* techmap_autopurge *) input [47:0] PCIN,
input RSTA, (* techmap_autopurge *) input RSTA,
input RSTALLCARRYIN, (* techmap_autopurge *) input RSTALLCARRYIN,
input RSTALUMODE, (* techmap_autopurge *) input RSTALUMODE,
input RSTB, (* techmap_autopurge *) input RSTB,
input RSTC, (* techmap_autopurge *) input RSTC,
input RSTCTRL, (* techmap_autopurge *) input RSTCTRL,
input RSTD, (* techmap_autopurge *) input RSTD,
input RSTINMODE, (* techmap_autopurge *) input RSTINMODE,
input RSTM, (* techmap_autopurge *) input RSTM,
input RSTP (* techmap_autopurge *) input RSTP
); );
parameter integer ACASCREG = 1; parameter integer ACASCREG = 1;
parameter integer ADREG = 1; parameter integer ADREG = 1;