mirror of https://github.com/YosysHQ/yosys.git
Added support for bit/part select to mem2reg rewriter
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@ -1974,6 +1974,8 @@ void AstNode::mem2reg_as_needed_pass2(std::set<AstNode*> &mem2reg_set, AstNode *
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continue;
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AstNode *cond_node = new AstNode(AST_COND, AstNode::mkconst_int(i, false, addr_bits), new AstNode(AST_BLOCK));
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AstNode *assign_reg = new AstNode(type, new AstNode(AST_IDENTIFIER), new AstNode(AST_IDENTIFIER));
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if (children[0]->children.size() == 2)
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assign_reg->children[0]->children.push_back(children[0]->children[1]->clone());
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assign_reg->children[0]->str = stringf("%s[%d]", children[0]->str.c_str(), i);
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assign_reg->children[1]->str = id_data;
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cond_node->children[1]->children.push_back(assign_reg);
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@ -1990,6 +1992,10 @@ void AstNode::mem2reg_as_needed_pass2(std::set<AstNode*> &mem2reg_set, AstNode *
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if (type == AST_IDENTIFIER && id2ast && mem2reg_set.count(id2ast) > 0)
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{
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AstNode *bit_part_sel = NULL;
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if (children.size() == 2)
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bit_part_sel = children[1]->clone();
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if (children[0]->children[0]->type == AST_CONSTANT)
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{
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int id = children[0]->children[0]->integer;
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@ -2073,6 +2079,9 @@ void AstNode::mem2reg_as_needed_pass2(std::set<AstNode*> &mem2reg_set, AstNode *
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id2ast = NULL;
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str = id_data;
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}
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if (bit_part_sel)
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children.push_back(bit_part_sel);
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}
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assert(id2ast == NULL || mem2reg_set.count(id2ast) == 0);
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@ -134,3 +134,24 @@ always @(posedge clk) begin
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end
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endmodule
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// ----------------------------------------------------------
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module test06(input clk, input rst, input [2:0] idx, input [7:0] din, output [7:0] dout);
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(* gentb_constant=0 *) wire rst;
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reg [7:0] test [0:7];
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integer i;
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always @(posedge clk or posedge rst) begin
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if (rst) begin
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for (i=0; i<8; i=i+1)
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test[i] <= 0;
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end else begin
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test[0][2] <= din[1];
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test[0][5] <= test[0][2];
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test[idx][3] <= din[idx];
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test[idx][6] <= test[idx][2];
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test[idx][idx] <= !test[idx][idx];
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end
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end
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assign dout = test[idx];
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endmodule
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