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sigmap: comments
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@ -1129,6 +1129,11 @@ public:
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const_iterator end() const { return const_iterator(*this, offset + size()); }
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};
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/**
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* Union-find data structure with a promotion method
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* mfp stands for "merge, find, promote"
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* i-prefixed methods operate on indices in parents
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*/
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template<typename K, typename OPS>
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class mfp
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{
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@ -1142,13 +1147,18 @@ public:
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{
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}
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// Finds a given element's index. If it isn't in the data structure,
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// it is added as its own set
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int operator()(const K &key) const
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{
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int i = database(key);
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// If the lookup caused the database to grow,
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// also add a corresponding entry in parents initialized to -1 (no parent)
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parents.resize(database.size(), -1);
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return i;
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}
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// Finds an element at given index
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const K &operator[](int index) const
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{
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return database[index];
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@ -1161,6 +1171,11 @@ public:
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while (parents[p] != -1)
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p = parents[p];
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// p is now the representative of i
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// Now we traverse from i up to the representative again
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// and make p the parent of all the nodes along the way.
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// This is a side effect and doesn't affect the return value.
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// It speeds up future find operations
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while (k != p) {
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int next_k = parents[k];
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parents[k] = p;
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@ -1170,6 +1185,7 @@ public:
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return p;
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}
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// Merge sets if the given indices belong to different sets
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void imerge(int i, int j)
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{
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i = ifind(i);
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@ -229,6 +229,13 @@ using sort_by_name_id_guard = typename std::enable_if<std::is_same<T,RTLIL::Cell
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template<typename T>
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class SigSet<T, sort_by_name_id_guard<T>> : public SigSet<T, RTLIL::sort_by_name_id<typename std::remove_pointer<T>::type>> {};
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/**
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* SigMap wraps a union-find "database"
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* to map SigBits of a module to canonical representative SigBits.
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* SigBits that are connected share a set in the underlying database.
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* If a SigBit has a const state (impl: bit.wire is nullptr),
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* it's promoted to a representative.
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*/
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struct SigMap
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{
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mfp<SigBit> database;
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@ -249,6 +256,7 @@ struct SigMap
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database.clear();
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}
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// Rebuild SigMap for all connections in module
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void set(RTLIL::Module *module)
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{
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int bitcount = 0;
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@ -262,6 +270,7 @@ struct SigMap
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add(it.first, it.second);
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}
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// Add connections from "from" to "to", bit-by-bit
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void add(const RTLIL::SigSpec& from, const RTLIL::SigSpec& to)
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{
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log_assert(GetSize(from) == GetSize(to));
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@ -287,6 +296,7 @@ struct SigMap
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}
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}
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// Add sig as disconnected from anything
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void add(const RTLIL::SigBit &bit)
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{
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const auto &b = database.find(bit);
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@ -302,6 +312,7 @@ struct SigMap
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inline void add(Wire *wire) { return add(RTLIL::SigSpec(wire)); }
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// Modify bit to its representative
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void apply(RTLIL::SigBit &bit) const
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{
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bit = database.find(bit);
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@ -332,6 +343,7 @@ struct SigMap
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return sig;
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}
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// All non-const bits
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RTLIL::SigSpec allbits() const
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{
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RTLIL::SigSpec sig;
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