mirror of https://github.com/YosysHQ/yosys.git
Support $lut cells. Both C++ and SMT tests pass
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7cff8fa3a3
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@ -248,9 +248,31 @@ public:
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return extend(factory.unsigned_div(a, b, width), width, y_width, false);
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return extend(factory.unsigned_div(a, b, width), width, y_width, false);
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}
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}
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} else if(cellType == ID($pow)) {
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} else if(cellType == ID($pow)) {
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return handle_pow(inputs.at(ID(A)), a_width, inputs.at(ID(B)), b_width, y_width, a_signed && b_signed);
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return handle_pow(inputs.at(ID(A)), a_width, inputs.at(ID(B)), b_width, y_width, a_signed && b_signed);
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} else if (cellType == ID($lut)) {
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int width = parameters.at(ID(WIDTH)).as_int();
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Const lut_table = parameters.at(ID(LUT));
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T a = inputs.at(ID(A));
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// Output initialization
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T y = factory.constant(Const(0, 1));
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// Iterate over each possible input combination
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for (int i = 0; i < (1 << width); ++i) {
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// Create a constant representing the value of i
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T i_val = factory.constant(Const(i, width));
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// Check if the input matches this value
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T match = factory.equal(a, i_val, width);
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// Get the corresponding LUT value
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bool lut_val = lut_table.bits[i] == State::S1;
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T lut_output = factory.constant(Const(lut_val, 1));
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// Use a multiplexer to select the correct output based on the match
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y = factory.mux(y, lut_output, match, 1);
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}
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return y;
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} else{
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} else{
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log_error("unhandled cell in CellSimplifier %s\n", cellType.c_str());
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log_error("unhandled cell in CellSimplifier %s\n", cellType.c_str());
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}
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}
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}
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}
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};
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};
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