mirror of https://github.com/YosysHQ/yosys.git
drivertools: Utility code for indexing and traversing signal drivers
It adds `DriveBit`, `DriveChunk` and `DriveSpec` types which are similar to `SigBit`, `SigChunk` and `SigSpec` but can also directly represent cell ports, undriven bits and multiple drivers. For indexing an RTLIL module and for querying signal drivers it comes with a `DriverMap` type which is somewhat similar to a `SigMap` but is guaranteed to produce signal drivers as returned representatives. A `DriverMap` can also optionally preserve connections via intermediate wires (e.g. querying the driver of a cell input port will return a connected intermediate wire, querying the driver of that wire will return the cell output port that's driving the wire).
This commit is contained in:
Jannis Harder
Emily Schmidt
parent
f24e2536c6
commit
56572978f5
2
Makefile
2
Makefile
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@ -598,6 +598,7 @@ $(eval $(call add_include_file,kernel/celltypes.h))
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$(eval $(call add_include_file,kernel/consteval.h))
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$(eval $(call add_include_file,kernel/constids.inc))
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$(eval $(call add_include_file,kernel/cost.h))
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$(eval $(call add_include_file,kernel/drivertools.h))
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$(eval $(call add_include_file,kernel/ff.h))
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$(eval $(call add_include_file,kernel/ffinit.h))
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$(eval $(call add_include_file,kernel/ffmerge.h))
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@ -638,6 +639,7 @@ $(eval $(call add_include_file,backends/rtlil/rtlil_backend.h))
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OBJS += kernel/driver.o kernel/register.o kernel/rtlil.o kernel/log.o kernel/calc.o kernel/yosys.o
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OBJS += kernel/binding.o
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OBJS += kernel/cellaigs.o kernel/celledges.o kernel/cost.o kernel/satgen.o kernel/scopeinfo.o kernel/qcsat.o kernel/mem.o kernel/ffmerge.o kernel/ff.o kernel/yw.o kernel/json.o kernel/fmt.o
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OBJS += kernel/drivertools.o
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ifeq ($(ENABLE_ZLIB),1)
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OBJS += kernel/fstdata.o
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endif
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@ -0,0 +1,946 @@
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/*
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* yosys -- Yosys Open SYnthesis Suite
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*
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* Copyright (C) 2024 Jannis Harder <jix@yosyshq.com> <me@jix.one>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include "kernel/drivertools.h"
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YOSYS_NAMESPACE_BEGIN
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DriveBit::DriveBit(SigBit const &bit)
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{
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if (bit.is_wire())
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*this = DriveBitWire(bit.wire, bit.offset);
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else
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*this = bit.data;
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}
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void DriveBit::merge(DriveBit const &other)
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{
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if (other.type_ == DriveType::NONE)
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return;
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if (type_ == DriveType::NONE) {
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*this = other;
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return;
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}
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if (type_ != DriveType::MULTIPLE) {
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DriveBitMultiple multi(std::move(*this));
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*this = std::move(multi);
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}
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multiple().merge(other);
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}
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void DriveBitMultiple::merge(DriveBit const &single)
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{
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if (single.type() == DriveType::NONE)
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return;
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if (single.type() == DriveType::MULTIPLE) {
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merge(single.multiple());
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return;
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}
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multiple_.emplace(single);
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}
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void DriveBitMultiple::merge(DriveBit &&single)
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{
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if (single.type() == DriveType::NONE)
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return;
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if (single.type() == DriveType::MULTIPLE) {
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merge(std::move(single.multiple()));
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return;
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}
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multiple_.emplace(std::move(single));
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}
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DriveBitMultiple DriveChunkMultiple::operator[](int i) const
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{
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DriveBitMultiple result;
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for (auto const &single : multiple_)
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result.merge(single[i]);
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return result;
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}
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bool DriveChunkWire::can_append(DriveBitWire const &bit) const
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{
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return bit.wire == wire && bit.offset == offset + width;
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}
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bool DriveChunkWire::try_append(DriveBitWire const &bit)
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{
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if (!can_append(bit))
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return false;
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width += 1;
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return true;
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}
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bool DriveChunkWire::try_append(DriveChunkWire const &chunk)
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{
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if (chunk.wire != wire || chunk.offset != offset + width)
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return false;
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width += chunk.width;
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return true;
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}
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bool DriveChunkPort::can_append(DriveBitPort const &bit) const
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{
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return bit.cell == cell && bit.port == port && bit.offset == offset + width;
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}
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bool DriveChunkPort::try_append(DriveBitPort const &bit)
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{
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if (!can_append(bit))
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return false;
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width += 1;
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return true;
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}
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bool DriveChunkPort::try_append(DriveChunkPort const &chunk)
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{
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if (chunk.cell != cell || chunk.port != port || chunk.offset != offset + width)
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return false;
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width += chunk.width;
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return true;
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}
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bool DriveChunkMarker::can_append(DriveBitMarker const &bit) const
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{
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return bit.marker == marker && bit.offset == offset + width;
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}
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bool DriveChunkMarker::try_append(DriveBitMarker const &bit)
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{
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if (!can_append(bit))
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return false;
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width += 1;
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return true;
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}
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bool DriveChunkMarker::try_append(DriveChunkMarker const &chunk)
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{
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if (chunk.marker != marker || chunk.offset != offset + width)
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return false;
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width += chunk.width;
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return true;
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}
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bool DriveChunkMultiple::can_append(DriveBitMultiple const &bit) const
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{
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if (bit.multiple().size() != multiple_.size())
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return false;
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int const_drivers = 0;
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for (DriveChunk const &single : multiple_)
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if (single.is_constant())
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const_drivers += 1;
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if (const_drivers > 1)
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return false;
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for (DriveBit const &single : bit.multiple())
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if (single.is_constant())
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const_drivers -= 1;
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if (const_drivers != 0)
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return false;
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for (DriveChunk const &single : multiple_)
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{
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switch (single.type())
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{
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case DriveType::CONSTANT: {
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} break;
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case DriveType::WIRE: {
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auto const &wire = single.wire();
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DriveBit next = DriveBitWire(wire.wire, wire.offset + wire.width);
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if (!bit.multiple().count(next))
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return false;
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} break;
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case DriveType::PORT: {
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auto const &port = single.port();
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DriveBit next = DriveBitPort(port.cell, port.port, port.offset + port.width);
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if (!bit.multiple().count(next))
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return false;
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} break;
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case DriveType::MARKER: {
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auto const &marker = single.marker();
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DriveBit next = DriveBitMarker(marker.marker, marker.offset + marker.width);
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if (!bit.multiple().count(next))
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return false;
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} break;
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default:
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return false;
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}
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}
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return true;
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}
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bool DriveChunkMultiple::can_append(DriveChunkMultiple const &chunk) const
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{
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if (chunk.multiple().size() != multiple_.size())
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return false;
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int const_drivers = 0;
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for (DriveChunk const &single : multiple_)
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if (single.is_constant())
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const_drivers += 1;
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if (const_drivers > 1)
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return false;
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for (DriveChunk const &single : chunk.multiple())
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if (single.is_constant())
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const_drivers -= 1;
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if (const_drivers != 0)
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return false;
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for (DriveChunk const &single : multiple_)
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{
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switch (single.type())
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{
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case DriveType::CONSTANT: {
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} break;
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case DriveType::WIRE: {
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auto const &wire = single.wire();
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DriveChunk next = DriveChunkWire(wire.wire, wire.offset + wire.width, chunk.size());
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if (!chunk.multiple().count(next))
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return false;
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} break;
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case DriveType::PORT: {
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auto const &port = single.port();
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DriveChunk next = DriveChunkPort(port.cell, port.port, port.offset + port.width, chunk.size());
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if (!chunk.multiple().count(next))
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return false;
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} break;
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case DriveType::MARKER: {
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auto const &marker = single.marker();
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DriveChunk next = DriveChunkMarker(marker.marker, marker.offset + marker.width, chunk.size());
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if (!chunk.multiple().count(next))
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return false;
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} break;
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default:
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return false;
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}
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}
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return true;
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}
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bool DriveChunkMultiple::try_append(DriveBitMultiple const &bit)
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{
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if (!can_append(bit))
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return false;
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width_ += 1;
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State constant;
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for (DriveBit const &single : bit.multiple())
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if (single.is_constant())
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constant = single.constant();
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for (DriveChunk &single : multiple_)
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{
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switch (single.type())
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{
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case DriveType::CONSTANT: {
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single.constant().bits.push_back(constant);
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} break;
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case DriveType::WIRE: {
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single.wire().width += 1;
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} break;
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case DriveType::PORT: {
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single.port().width += 1;
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} break;
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case DriveType::MARKER: {
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single.marker().width += 1;
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} break;
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default:
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log_abort();
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}
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}
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return true;
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}
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bool DriveChunkMultiple::try_append(DriveChunkMultiple const &chunk)
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{
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if (!can_append(chunk))
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return false;
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int width = chunk.size();
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width_ += width;
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Const constant;
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for (DriveChunk const &single : chunk.multiple())
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if (single.is_constant())
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constant = single.constant();
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for (DriveChunk &single : multiple_)
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{
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switch (single.type())
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{
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case DriveType::CONSTANT: {
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auto &bits = single.constant().bits;
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bits.insert(bits.end(), constant.bits.begin(), constant.bits.end());
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} break;
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case DriveType::WIRE: {
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single.wire().width += width;
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} break;
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case DriveType::PORT: {
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single.port().width += width;
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} break;
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case DriveType::MARKER: {
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single.marker().width += width;
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} break;
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default:
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log_abort();
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}
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}
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return true;
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}
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bool DriveChunk::can_append(DriveBit const &bit) const
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{
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if (size() == 0)
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return true;
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if (bit.type() != type_)
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return false;
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switch (type_)
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{
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case DriveType::NONE:
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return true;
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case DriveType::CONSTANT:
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return true;
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case DriveType::WIRE:
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return wire_.can_append(bit.wire());
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case DriveType::PORT:
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return port_.can_append(bit.port());
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case DriveType::MULTIPLE:
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return multiple_.can_append(bit.multiple());
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default:
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log_abort();
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}
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}
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bool DriveChunk::try_append(DriveBit const &bit)
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{
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if (size() == 0)
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*this = bit;
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if (bit.type() != type_)
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return false;
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switch (type_)
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{
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case DriveType::NONE:
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none_ += 1;
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return true;
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case DriveType::CONSTANT:
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constant_.bits.push_back(bit.constant());
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return true;
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case DriveType::WIRE:
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return wire_.try_append(bit.wire());
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case DriveType::PORT:
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return port_.try_append(bit.port());
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case DriveType::MULTIPLE:
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return multiple_.try_append(bit.multiple());
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default:
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log_abort();
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}
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}
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bool DriveChunk::try_append(DriveChunk const &chunk)
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{
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if (size() == 0)
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*this = chunk;
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if (chunk.type_ != type_)
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return false;
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switch (type_)
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{
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case DriveType::NONE:
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none_ += chunk.none_;
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return true;
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case DriveType::CONSTANT:
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constant_.bits.insert(constant_.bits.end(), chunk.constant_.bits.begin(), chunk.constant_.bits.end());
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return true;
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case DriveType::WIRE:
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return wire_.try_append(chunk.wire());
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case DriveType::PORT:
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return port_.try_append(chunk.port());
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case DriveType::MARKER:
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return marker_.try_append(chunk.marker());
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case DriveType::MULTIPLE:
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return multiple_.try_append(chunk.multiple());
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}
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log_abort();
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}
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void DriveSpec::append(DriveBit const &bit)
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{
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hash_ = 0;
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if (!packed()) {
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bits_.push_back(bit);
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width_ += 1;
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return;
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}
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if (chunks_.empty() || !chunks_.back().try_append(bit))
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chunks_.emplace_back(bit);
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width_ += 1;
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}
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void DriveSpec::append(DriveChunk const &chunk)
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{
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hash_ = 0;
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pack();
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if (chunks_.empty() || !chunks_.back().try_append(chunk))
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chunks_.emplace_back(chunk);
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width_ += chunk.size();
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}
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void DriveSpec::pack() const {
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if (bits_.empty())
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return;
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std::vector<DriveBit> bits(std::move(bits_));
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for (auto &bit : bits)
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if (chunks_.empty() || !chunks_.back().try_append(bit))
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chunks_.emplace_back(std::move(bit));
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}
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void DriveSpec::unpack() const {
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if (chunks_.empty())
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return;
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for (auto &chunk : chunks_)
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{
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for (int i = 0, width = chunk.size(); i != width; ++i)
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{
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bits_.emplace_back(chunk[i]);
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}
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}
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chunks_.clear();
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}
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void DriveSpec::compute_width()
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{
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width_ = 0;
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for (auto const &chunk : chunks_)
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width_ += chunk.size();
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}
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void DriverMap::DriveBitGraph::add_edge(DriveBitId src, DriveBitId dst)
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{
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if (first_edges.emplace(src, dst).first->second == dst)
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return;
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if (second_edges.emplace(src, dst).first->second == dst)
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return;
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more_edges[src].emplace(dst);
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}
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DriverMap::DriveBitId DriverMap::DriveBitGraph::pop_edge(DriveBitId src)
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{
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// TODO unused I think?
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auto found_more = more_edges.find(src);
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if (found_more != more_edges.end()) {
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auto result = found_more->second.pop();
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if (found_more->second.empty())
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more_edges.erase(found_more);
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return result;
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}
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auto found_second = second_edges.find(src);
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if (found_second != second_edges.end()) {
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auto result = found_second->second;
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second_edges.erase(found_second);
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return result;
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}
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auto found_first = first_edges.find(src);
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if (found_first != first_edges.end()) {
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auto result = found_first->second;
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first_edges.erase(found_first);
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return result;
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}
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return DriveBitId();
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}
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void DriverMap::DriveBitGraph::clear(DriveBitId src)
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{
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first_edges.erase(src);
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second_edges.erase(src);
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more_edges.erase(src);
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}
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bool DriverMap::DriveBitGraph::contains(DriveBitId src)
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{
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return first_edges.count(src);
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}
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int DriverMap::DriveBitGraph::count(DriveBitId src)
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{
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if (!first_edges.count(src))
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return 0;
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if (!second_edges.count(src))
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return 1;
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auto found = more_edges.find(src);
|
||||
if (found == more_edges.end())
|
||||
return 2;
|
||||
return GetSize(found->second);
|
||||
}
|
||||
|
||||
DriverMap::DriveBitId DriverMap::DriveBitGraph::at(DriveBitId src, int index)
|
||||
{
|
||||
if (index == 0)
|
||||
return first_edges.at(src);
|
||||
else if (index == 1)
|
||||
return second_edges.at(src);
|
||||
else
|
||||
return *more_edges.at(src).element(index - 2);
|
||||
}
|
||||
|
||||
|
||||
DriverMap::BitMode DriverMap::bit_mode(DriveBit const &bit)
|
||||
{
|
||||
switch (bit.type())
|
||||
{
|
||||
case DriveType::NONE:
|
||||
return BitMode::NONE;
|
||||
case DriveType::CONSTANT:
|
||||
// TODO how to handle Sx here?
|
||||
return bit.constant() == State::Sz ? BitMode::NONE : BitMode::DRIVER;
|
||||
case DriveType::WIRE: {
|
||||
auto const &wire = bit.wire();
|
||||
bool driver = wire.wire->port_input;
|
||||
bool driven = wire.wire->port_output;
|
||||
|
||||
if (driver && !driven)
|
||||
return BitMode::DRIVER;
|
||||
else if (driven && !driver)
|
||||
return BitMode::DRIVEN;
|
||||
else if (driver && driven)
|
||||
return BitMode::TRISTATE;
|
||||
else
|
||||
return keep_wire(bit.wire().wire) ? BitMode::KEEP : BitMode::NONE;
|
||||
}
|
||||
case DriveType::PORT: {
|
||||
auto const &port = bit.port();
|
||||
bool driver = celltypes.cell_output(port.cell->type, port.port);
|
||||
bool driven = celltypes.cell_input(port.cell->type, port.port);
|
||||
if (driver && !driven)
|
||||
return BitMode::DRIVER;
|
||||
else if (driven && !driver)
|
||||
return BitMode::DRIVEN_UNIQUE;
|
||||
else
|
||||
return BitMode::TRISTATE;
|
||||
}
|
||||
case DriveType::MARKER: {
|
||||
// TODO user supplied classification
|
||||
log_abort();
|
||||
}
|
||||
default:
|
||||
log_abort();
|
||||
}
|
||||
}
|
||||
|
||||
DriverMap::DriveBitId DriverMap::id_from_drive_bit(DriveBit const &bit)
|
||||
{
|
||||
switch (bit.type())
|
||||
{
|
||||
case DriveType::NONE:
|
||||
return -1;
|
||||
case DriveType::CONSTANT:
|
||||
return (int)bit.constant();
|
||||
case DriveType::WIRE: {
|
||||
auto const &wire_bit = bit.wire();
|
||||
int offset = next_offset;
|
||||
auto insertion = wire_offsets.emplace(wire_bit.wire, offset);
|
||||
if (insertion.second) {
|
||||
if (wire_bit.wire->width == 1) {
|
||||
log_assert(wire_bit.offset == 0);
|
||||
isolated_drive_bits.emplace(offset, bit);
|
||||
} else
|
||||
drive_bits.emplace(offset, DriveBitWire(wire_bit.wire, 0));
|
||||
next_offset += wire_bit.wire->width;
|
||||
}
|
||||
return insertion.first->second.id + wire_bit.offset;
|
||||
}
|
||||
case DriveType::PORT: {
|
||||
auto const &port_bit = bit.port();
|
||||
auto key = std::make_pair(port_bit.cell, port_bit.port);
|
||||
int offset = next_offset;
|
||||
auto insertion = port_offsets.emplace(key, offset);
|
||||
if (insertion.second) {
|
||||
int width = port_bit.cell->connections().at(port_bit.port).size();
|
||||
if (width == 1 && offset == 0) {
|
||||
log_assert(port_bit.offset == 0);
|
||||
isolated_drive_bits.emplace(offset, bit);
|
||||
} else
|
||||
drive_bits.emplace(offset, DriveBitPort(port_bit.cell, port_bit.port, 0));
|
||||
next_offset += width;
|
||||
}
|
||||
return insertion.first->second.id + port_bit.offset;
|
||||
}
|
||||
default:
|
||||
log_assert(false && "unsupported DriveType in DriverMap");
|
||||
}
|
||||
log_abort();
|
||||
}
|
||||
|
||||
DriveBit DriverMap::drive_bit_from_id(DriveBitId id)
|
||||
{
|
||||
auto found_isolated = isolated_drive_bits.find(id);
|
||||
if (found_isolated != isolated_drive_bits.end())
|
||||
return found_isolated->second;
|
||||
|
||||
auto found = drive_bits.upper_bound(id);
|
||||
if (found == drive_bits.begin()) {
|
||||
return id < 0 ? DriveBit() : DriveBit((State) id.id);
|
||||
}
|
||||
--found;
|
||||
DriveBit result = found->second;
|
||||
if (result.is_wire()) {
|
||||
result.wire().offset += id.id - found->first.id;
|
||||
} else {
|
||||
log_assert(result.is_port());
|
||||
result.port().offset += id.id - found->first.id;
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
void DriverMap::connect_directed_merge(DriveBitId driven_id, DriveBitId driver_id)
|
||||
{
|
||||
if (driven_id == driver_id)
|
||||
return;
|
||||
|
||||
same_driver.merge(driven_id, driver_id);
|
||||
|
||||
for (int i = 0, end = connected_drivers.count(driven_id); i != end; ++i)
|
||||
connected_drivers.add_edge(driver_id, connected_drivers.at(driven_id, i));
|
||||
|
||||
connected_drivers.clear(driven_id);
|
||||
|
||||
for (int i = 0, end = connected_undirected.count(driven_id); i != end; ++i)
|
||||
connected_undirected.add_edge(driver_id, connected_undirected.at(driven_id, i));
|
||||
|
||||
connected_undirected.clear(driven_id);
|
||||
}
|
||||
|
||||
void DriverMap::connect_directed_buffer(DriveBitId driven_id, DriveBitId driver_id)
|
||||
{
|
||||
connected_drivers.add_edge(driven_id, driver_id);
|
||||
}
|
||||
|
||||
void DriverMap::connect_undirected(DriveBitId a_id, DriveBitId b_id)
|
||||
{
|
||||
connected_undirected.add_edge(a_id, b_id);
|
||||
connected_undirected.add_edge(b_id, a_id);
|
||||
}
|
||||
|
||||
void DriverMap::add(Module *module)
|
||||
{
|
||||
for (auto const &conn : module->connections())
|
||||
add(conn.first, conn.second);
|
||||
|
||||
for (auto cell : module->cells())
|
||||
for (auto const &conn : cell->connections())
|
||||
add_port(cell, conn.first, conn.second);
|
||||
}
|
||||
|
||||
// Add a single bit connection to the driver map.
|
||||
void DriverMap::add(DriveBit const &a, DriveBit const &b)
|
||||
{
|
||||
DriveBitId a_id = id_from_drive_bit(a);
|
||||
DriveBitId b_id = id_from_drive_bit(b);
|
||||
|
||||
DriveBitId orig_a_id = a_id;
|
||||
DriveBitId orig_b_id = b_id;
|
||||
|
||||
a_id = same_driver.find(a_id);
|
||||
b_id = same_driver.find(b_id);
|
||||
|
||||
if (a_id == b_id)
|
||||
return;
|
||||
|
||||
BitMode a_mode = bit_mode(orig_a_id == a_id ? a : drive_bit_from_id(a_id));
|
||||
BitMode b_mode = bit_mode(orig_b_id == b_id ? b : drive_bit_from_id(b_id));
|
||||
|
||||
// If either bit is just a wire that we don't need to keep, merge and
|
||||
// use the other end as representative bit.
|
||||
if (a_mode == BitMode::NONE)
|
||||
connect_directed_merge(a_id, b_id);
|
||||
else if (b_mode == BitMode::NONE)
|
||||
connect_directed_merge(b_id, a_id);
|
||||
// If either bit requires a driven value and has a unique driver, merge
|
||||
// and use the other end as representative bit.
|
||||
else if (a_mode == BitMode::DRIVEN_UNIQUE && !(b_mode == BitMode::DRIVEN_UNIQUE || b_mode == BitMode::DRIVEN))
|
||||
connect_directed_buffer(a_id, b_id);
|
||||
else if (b_mode == BitMode::DRIVEN_UNIQUE && !(b_mode == BitMode::DRIVEN_UNIQUE || b_mode == BitMode::DRIVEN))
|
||||
connect_directed_buffer(b_id, a_id);
|
||||
// If either bit only drives a value, store a directed connection from
|
||||
// it to the other bit.
|
||||
else if (a_mode == BitMode::DRIVER)
|
||||
connect_directed_buffer(b_id, a_id);
|
||||
else if (b_mode == BitMode::DRIVER)
|
||||
connect_directed_buffer(a_id, b_id);
|
||||
// Otherwise we store an undirected connection which we will resolve
|
||||
// during querying.
|
||||
else
|
||||
connect_undirected(a_id, b_id);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
// Specialized version that avoids unpacking
|
||||
void DriverMap::add(SigSpec const &a, SigSpec const &b)
|
||||
{
|
||||
log_assert(a.size() == b.size());
|
||||
auto const &a_chunks = a.chunks();
|
||||
auto const &b_chunks = b.chunks();
|
||||
|
||||
auto a_chunk = a_chunks.begin();
|
||||
auto a_end = a_chunks.end();
|
||||
int a_offset = 0;
|
||||
|
||||
auto b_chunk = b_chunks.begin();
|
||||
int b_offset = 0;
|
||||
|
||||
SigChunk tmp_a, tmp_b;
|
||||
while (a_chunk != a_end) {
|
||||
int a_width = a_chunk->width - a_offset;
|
||||
if (a_width == 0) {
|
||||
a_offset = 0;
|
||||
++a_chunk;
|
||||
continue;
|
||||
}
|
||||
int b_width = b_chunk->width - b_offset;
|
||||
if (b_width == 0) {
|
||||
b_offset = 0;
|
||||
++b_chunk;
|
||||
continue;
|
||||
}
|
||||
int width = std::min(a_width, b_width);
|
||||
log_assert(width > 0);
|
||||
|
||||
SigChunk const &a_subchunk =
|
||||
a_offset == 0 && a_width == width ? *a_chunk : a_chunk->extract(a_offset, width);
|
||||
SigChunk const &b_subchunk =
|
||||
b_offset == 0 && b_width == width ? *b_chunk : b_chunk->extract(b_offset, width);
|
||||
|
||||
add(a_subchunk, b_subchunk);
|
||||
|
||||
a_offset += width;
|
||||
b_offset += width;
|
||||
}
|
||||
}
|
||||
|
||||
void DriverMap::add_port(Cell *cell, IdString const &port, SigSpec const &b)
|
||||
{
|
||||
int offset = 0;
|
||||
for (auto const &chunk : b.chunks()) {
|
||||
add(chunk, DriveChunkPort(cell, port, offset, chunk.width));
|
||||
offset += chunk.size();
|
||||
}
|
||||
}
|
||||
|
||||
void DriverMap::orient_undirected(DriveBitId id)
|
||||
{
|
||||
pool<DriveBitId> &seen = orient_undirected_seen;
|
||||
pool<DriveBitId> &drivers = orient_undirected_drivers;
|
||||
dict<DriveBitId, int> &distance = orient_undirected_distance;
|
||||
seen.clear();
|
||||
drivers.clear();
|
||||
|
||||
seen.emplace(id);
|
||||
|
||||
for (int pos = 0; pos < GetSize(seen); ++pos) {
|
||||
DriveBitId current = *seen.element(seen.size() - 1 - pos);
|
||||
DriveBit bit = drive_bit_from_id(current);
|
||||
|
||||
BitMode mode = bit_mode(bit);
|
||||
|
||||
if (mode == BitMode::DRIVER || mode == BitMode::TRISTATE)
|
||||
drivers.emplace(current);
|
||||
|
||||
if (connected_drivers.contains(current))
|
||||
drivers.emplace(current);
|
||||
|
||||
int undirected_driver_count = connected_undirected.count(current);
|
||||
|
||||
for (int i = 0; i != undirected_driver_count; ++i)
|
||||
seen.emplace(same_driver.find(connected_undirected.at(current, i)));
|
||||
}
|
||||
|
||||
if (drivers.empty())
|
||||
for (auto seen_id : seen)
|
||||
drivers.emplace(seen_id);
|
||||
|
||||
for (auto driver : drivers)
|
||||
{
|
||||
distance.clear();
|
||||
distance.emplace(driver, 0);
|
||||
|
||||
for (int pos = 0; pos < GetSize(distance); ++pos) {
|
||||
auto current_it = distance.element(distance.size() - 1 - pos);
|
||||
|
||||
DriveBitId current = current_it->first;
|
||||
int undirected_driver_count = connected_undirected.count(current);
|
||||
|
||||
for (int i = 0; i != undirected_driver_count; ++i)
|
||||
{
|
||||
DriveBitId next = same_driver.find(connected_undirected.at(current, i));
|
||||
auto emplaced = distance.emplace(next, current_it->second + 1);
|
||||
if (emplaced.first->second == current_it->second + 1)
|
||||
connected_oriented.add_edge(next, current);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (auto seen_id : seen)
|
||||
oriented_present.emplace(seen_id);
|
||||
}
|
||||
|
||||
DriveBit DriverMap::operator()(DriveBit const &bit)
|
||||
{
|
||||
if (bit.type() == DriveType::MARKER || bit.type() == DriveType::NONE)
|
||||
return bit;
|
||||
if (bit.type() == DriveType::MULTIPLE)
|
||||
{
|
||||
DriveBit result;
|
||||
for (auto const &inner : bit.multiple().multiple())
|
||||
result.merge((*this)(inner));
|
||||
return result;
|
||||
}
|
||||
|
||||
DriveBitId bit_id = id_from_drive_bit(bit);
|
||||
|
||||
bit_id = same_driver.find(bit_id);
|
||||
|
||||
DriveBit bit_repr = drive_bit_from_id(bit_id);
|
||||
|
||||
BitMode mode = bit_mode(bit_repr);
|
||||
|
||||
int implicit_driver_count = connected_drivers.count(bit_id);
|
||||
if (connected_undirected.contains(bit_id) && !oriented_present.count(bit_id))
|
||||
orient_undirected(bit_id);
|
||||
|
||||
DriveBit driver;
|
||||
|
||||
if (mode == BitMode::DRIVER || mode == BitMode::TRISTATE)
|
||||
driver = bit_repr;
|
||||
|
||||
for (int i = 0; i != implicit_driver_count; ++i)
|
||||
driver.merge(drive_bit_from_id(connected_drivers.at(bit_id, i)));
|
||||
|
||||
int oriented_driver_count = connected_oriented.count(bit_id);
|
||||
for (int i = 0; i != oriented_driver_count; ++i)
|
||||
driver.merge(drive_bit_from_id(connected_oriented.at(bit_id, i)));
|
||||
|
||||
return driver;
|
||||
}
|
||||
|
||||
DriveSpec DriverMap::operator()(DriveSpec spec)
|
||||
{
|
||||
DriveSpec result;
|
||||
|
||||
for (int i = 0, width = spec.size(); i != width; ++i)
|
||||
result.append((*this)(spec[i]));
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
const char *log_signal(DriveChunkWire const &chunk)
|
||||
{
|
||||
const char *id = log_id(chunk.wire->name);
|
||||
if (chunk.is_whole())
|
||||
return id;
|
||||
if (chunk.width == 1)
|
||||
return log_str(stringf("%s [%d]", id, chunk.offset));
|
||||
return log_str(stringf("%s [%d:%d]", id, chunk.offset + chunk.width - 1, chunk.offset));
|
||||
}
|
||||
|
||||
|
||||
const char *log_signal(DriveChunkPort const &chunk)
|
||||
{
|
||||
const char *cell_id = log_id(chunk.cell->name);
|
||||
const char *port_id = log_id(chunk.port);
|
||||
if (chunk.is_whole())
|
||||
return log_str(stringf("%s <%s>", cell_id, port_id));
|
||||
if (chunk.width == 1)
|
||||
return log_str(stringf("%s <%s> [%d]", cell_id, port_id, chunk.offset));
|
||||
return log_str(stringf("%s <%s> [%d:%d]", cell_id, port_id, chunk.offset + chunk.width - 1, chunk.offset));
|
||||
}
|
||||
|
||||
const char *log_signal(DriveChunkMarker const &chunk)
|
||||
{
|
||||
if (chunk.width == 1)
|
||||
return log_str(stringf("<marker %d> [%d]", chunk.marker, chunk.offset));
|
||||
return log_str(stringf("<marker %d> [%d:%d]", chunk.marker, chunk.offset + chunk.width - 1, chunk.offset));
|
||||
}
|
||||
|
||||
const char *log_signal(DriveChunk const &chunk)
|
||||
{
|
||||
switch (chunk.type())
|
||||
{
|
||||
case DriveType::NONE:
|
||||
return log_str(stringf("<none x%d>", chunk.size()));
|
||||
case DriveType::CONSTANT:
|
||||
return log_const(chunk.constant());
|
||||
case DriveType::WIRE:
|
||||
return log_signal(chunk.wire());
|
||||
case DriveType::PORT:
|
||||
return log_signal(chunk.port());
|
||||
case DriveType::MARKER:
|
||||
return log_signal(chunk.marker());
|
||||
case DriveType::MULTIPLE: {
|
||||
std::string str = "<multiple";
|
||||
const char *sep = " ";
|
||||
for (auto const &single : chunk.multiple().multiple()) {
|
||||
str += sep;
|
||||
sep = ", ";
|
||||
str += log_signal(single);
|
||||
}
|
||||
str += ">";
|
||||
return log_str(str);
|
||||
}
|
||||
default:
|
||||
log_abort();
|
||||
}
|
||||
}
|
||||
|
||||
const char *log_signal(DriveSpec const &spec)
|
||||
{
|
||||
auto &chunks = spec.chunks();
|
||||
if (chunks.empty())
|
||||
return "{}";
|
||||
if (chunks.size() == 1)
|
||||
return log_signal(chunks[0]);
|
||||
|
||||
std::string str;
|
||||
const char *sep = "{ ";
|
||||
|
||||
for (auto i = chunks.rbegin(), end = chunks.rend(); i != end; ++i)
|
||||
{
|
||||
str += sep;
|
||||
sep = " ";
|
||||
str += log_signal(*i);
|
||||
}
|
||||
str += " }";
|
||||
|
||||
return log_str(str);
|
||||
}
|
||||
|
||||
YOSYS_NAMESPACE_END
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue