riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

abc_new: Fix PI confusion in whitebox model export

This commit is contained in:
Martin Povišer 2024-11-13 16:05:58 +01:00
parent 2a3f60bc06
commit 559209c856
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
backends/aiger2/aiger.cc
View File

@ -1102,7 +1102,7 @@ struct XAigerWriter : AigerWriter {
holes_module->ports.push_back(w->name);
holes_pis.push_back(w);
}
in_conn.append(holes_pis[i]);
in_conn.append(holes_pis[holes_pi_idx]);
holes_pi_idx++;
}
holes_wb->setPort(port_id, in_conn);