mirror of https://github.com/YosysHQ/yosys.git
Merge pull request #3953 from georgerennie/bug_3769
write_smt2: Check for constant bool after fully resolving signal
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commit
558b2f9ae9
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@ -329,13 +329,14 @@ struct Smt2Worker
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{
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{
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sigmap.apply(bit);
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sigmap.apply(bit);
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if (bit_driver.count(bit)) {
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export_cell(bit_driver.at(bit));
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sigmap.apply(bit);
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}
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if (bit.wire == nullptr)
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if (bit.wire == nullptr)
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return bit == RTLIL::State::S1 ? "true" : "false";
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return bit == RTLIL::State::S1 ? "true" : "false";
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if (bit_driver.count(bit))
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export_cell(bit_driver.at(bit));
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sigmap.apply(bit);
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if (fcache.count(bit) == 0) {
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if (fcache.count(bit) == 0) {
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if (verbose) log("%*s-> external bool: %s\n", 2+2*GetSize(recursive_cells), "",
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if (verbose) log("%*s-> external bool: %s\n", 2+2*GetSize(recursive_cells), "",
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log_signal(bit));
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log_signal(bit));
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