mirror of https://github.com/YosysHQ/yosys.git
Improved TopoSort determinism
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parent
461594bb83
commit
546e8b5fe7
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@ -216,7 +216,7 @@ namespace RTLIL
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// set has an influence on the algorithm.
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// set has an influence on the algorithm.
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template<typename T> struct compare_ptr_by_name {
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template<typename T> struct compare_ptr_by_name {
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bool operator()(const T *a, const T *b) {
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bool operator()(const T *a, const T *b) const {
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return (a == nullptr || b == nullptr) ? (a < b) : (a->name < b->name);
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return (a == nullptr || b == nullptr) ? (a < b) : (a->name < b->name);
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}
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}
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};
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};
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@ -128,12 +128,12 @@ public:
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// A simple class for topological sorting
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// A simple class for topological sorting
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// ------------------------------------------------
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// ------------------------------------------------
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template<typename T>
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template<typename T, typename C = std::less<T>>
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struct TopoSort
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struct TopoSort
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{
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{
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bool analyze_loops, found_loops;
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bool analyze_loops, found_loops;
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std::map<T, std::set<T>> database;
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std::map<T, std::set<T, C>, C> database;
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std::set<std::set<T>> loops;
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std::set<std::set<T, C>> loops;
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std::vector<T> sorted;
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std::vector<T> sorted;
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TopoSort()
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TopoSort()
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@ -145,7 +145,7 @@ struct TopoSort
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void node(T n)
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void node(T n)
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{
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{
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if (database.count(n) == 0)
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if (database.count(n) == 0)
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database[n] = std::set<T>();
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database[n] = std::set<T, C>();
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}
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}
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void edge(T left, T right)
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void edge(T left, T right)
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@ -154,12 +154,12 @@ struct TopoSort
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database[right].insert(left);
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database[right].insert(left);
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}
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}
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void sort_worker(const T &n, std::set<T> &marked_cells, std::set<T> &active_cells, std::vector<T> &active_stack)
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void sort_worker(const T &n, std::set<T, C> &marked_cells, std::set<T, C> &active_cells, std::vector<T> &active_stack)
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{
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{
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if (active_cells.count(n)) {
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if (active_cells.count(n)) {
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found_loops = true;
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found_loops = true;
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if (analyze_loops) {
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if (analyze_loops) {
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std::set<T> loop;
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std::set<T, C> loop;
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for (int i = GetSize(active_stack)-1; i >= 0; i--) {
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for (int i = GetSize(active_stack)-1; i >= 0; i--) {
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loop.insert(active_stack[i]);
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loop.insert(active_stack[i]);
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if (active_stack[i] == n)
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if (active_stack[i] == n)
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@ -197,8 +197,8 @@ struct TopoSort
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sorted.clear();
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sorted.clear();
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found_loops = false;
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found_loops = false;
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std::set<T> marked_cells;
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std::set<T, C> marked_cells;
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std::set<T> active_cells;
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std::set<T, C> active_cells;
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std::vector<T> active_stack;
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std::vector<T> active_stack;
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for (auto &it : database)
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for (auto &it : database)
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@ -198,7 +198,7 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons
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SigMap assign_map(module);
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SigMap assign_map(module);
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std::map<RTLIL::SigSpec, RTLIL::SigSpec> invert_map;
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std::map<RTLIL::SigSpec, RTLIL::SigSpec> invert_map;
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TopoSort<RTLIL::Cell*> cells;
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TopoSort<RTLIL::Cell*, RTLIL::IdString::compare_ptr_by_name<RTLIL::Cell>> cells;
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std::map<RTLIL::Cell*, std::set<RTLIL::SigBit>> cell_to_inbit;
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std::map<RTLIL::Cell*, std::set<RTLIL::SigBit>> cell_to_inbit;
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std::map<RTLIL::SigBit, std::set<RTLIL::Cell*>> outbit_to_cell;
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std::map<RTLIL::SigBit, std::set<RTLIL::Cell*>> outbit_to_cell;
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@ -27,6 +27,8 @@
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USING_YOSYS_NAMESPACE
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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PRIVATE_NAMESPACE_BEGIN
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typedef RTLIL::IdString::compare_ptr_by_name<RTLIL::Cell> cell_ptr_cmp;
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struct ShareWorkerConfig
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struct ShareWorkerConfig
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{
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{
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int limit;
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int limit;
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@ -52,8 +54,8 @@ struct ShareWorker
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std::set<RTLIL::Cell*> recursion_state;
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std::set<RTLIL::Cell*> recursion_state;
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SigMap topo_sigmap;
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SigMap topo_sigmap;
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std::map<RTLIL::Cell*, std::set<RTLIL::Cell*>> topo_cell_drivers;
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std::map<RTLIL::Cell*, std::set<RTLIL::Cell*, cell_ptr_cmp>, cell_ptr_cmp> topo_cell_drivers;
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std::map<RTLIL::SigBit, std::set<RTLIL::Cell*>> topo_bit_drivers;
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std::map<RTLIL::SigBit, std::set<RTLIL::Cell*, cell_ptr_cmp>> topo_bit_drivers;
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std::vector<std::pair<RTLIL::SigBit, RTLIL::SigBit>> exclusive_ctrls;
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std::vector<std::pair<RTLIL::SigBit, RTLIL::SigBit>> exclusive_ctrls;
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@ -937,7 +939,7 @@ struct ShareWorker
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ct.setup_internals();
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ct.setup_internals();
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ct.setup_stdcells();
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ct.setup_stdcells();
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TopoSort<RTLIL::Cell*> toposort;
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TopoSort<RTLIL::Cell*, cell_ptr_cmp> toposort;
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toposort.analyze_loops = false;
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toposort.analyze_loops = false;
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topo_sigmap.set(module);
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topo_sigmap.set(module);
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@ -281,7 +281,7 @@ struct TechmapWorker
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SigMap sigmap(module);
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SigMap sigmap(module);
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TopoSort<RTLIL::Cell*> cells;
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TopoSort<RTLIL::Cell*, RTLIL::IdString::compare_ptr_by_name<RTLIL::Cell>> cells;
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std::map<RTLIL::Cell*, std::set<RTLIL::SigBit>> cell_to_inbit;
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std::map<RTLIL::Cell*, std::set<RTLIL::SigBit>> cell_to_inbit;
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std::map<RTLIL::SigBit, std::set<RTLIL::Cell*>> outbit_to_cell;
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std::map<RTLIL::SigBit, std::set<RTLIL::Cell*>> outbit_to_cell;
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