mirror of https://github.com/YosysHQ/yosys.git
Set Verific flag vhdl_support_variable_slice=1
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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@ -1835,6 +1835,7 @@ struct VerificPass : public Pass {
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Message::RegisterCallBackMsg(msg_func);
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RuntimeFlags::SetVar("db_preserve_user_nets", 1);
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RuntimeFlags::SetVar("db_allow_external_nets", 1);
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RuntimeFlags::SetVar("vhdl_support_variable_slice", 1);
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RuntimeFlags::SetVar("vhdl_ignore_assertion_statements", 0);
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RuntimeFlags::SetVar("veri_extract_dualport_rams", 0);
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RuntimeFlags::SetVar("veri_extract_multiport_rams", 1);
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