mirror of https://github.com/YosysHQ/yosys.git
xprop, setundef: Mark xprop decoding bwmuxes, exclude them from setundef
This adds the xprop_decoder attribute to bwmuxes that drive the original unencoded signals. Setundef is changed to ignore the x inputs of these bwmuxes, so that they survive the prep script of SBY's formal flow. This is required to make simulation (via sim) using the prep model show the decoded x signals instead of 0/1 values made up by the solver.
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@ -259,5 +259,6 @@ X(WR_PORTS)
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X(WR_PRIORITY_MASK)
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X(WR_WIDE_CONTINUATION)
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X(X)
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X(xprop_decoder)
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X(Y)
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X(Y_WIDTH)
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@ -502,7 +502,15 @@ struct SetundefPass : public Pass {
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}
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}
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module->rewrite_sigspecs(worker);
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for (auto &it : module->cells_)
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if (!it.second->get_bool_attribute(ID::xprop_decoder))
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it.second->rewrite_sigspecs(worker);
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for (auto &it : module->processes)
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it.second->rewrite_sigspecs(worker);
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for (auto &it : module->connections_) {
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worker(it.first);
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worker(it.second);
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}
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if (worker.next_bit_mode == MODE_ANYSEQ || worker.next_bit_mode == MODE_ANYCONST)
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{
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@ -252,7 +252,8 @@ struct XpropWorker
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}
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if (!driven_orig.empty()) {
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module->addBwmux(NEW_ID, driven_enc.is_1, Const(State::Sx, GetSize(driven_orig)), driven_enc.is_x, driven_orig);
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auto decoder = module->addBwmux(NEW_ID, driven_enc.is_1, Const(State::Sx, GetSize(driven_orig)), driven_enc.is_x, driven_orig);
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decoder->set_bool_attribute(ID::xprop_decoder);
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}
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if (!driven_never_x.first.empty()) {
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module->connect(driven_never_x);
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