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genrtlil: add width detection for AST_PREFIX nodes

This commit is contained in:
Zachary Snow 2021-07-29 12:35:22 -04:00 committed by Zachary Snow
parent 87ef1dd805
commit 4fec3a85cd
2 changed files with 26 additions and 0 deletions
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8
frontends/ast/genrtlil.cc
View File

@ -993,6 +993,14 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *foun
break;
}
case AST_PREFIX:
// Prefix nodes always resolve to identifiers in generate loops, so we
// can simply perform the resolution to determine the sign and width.
simplify(true, false, false, 1, -1, false, false);
log_assert(type == AST_IDENTIFIER);
detectSignWidthWorker(width_hint, sign_hint, found_real);
break;
case AST_FCALL:
if (str == "\\$anyconst" || str == "\\$anyseq" || str == "\\$allconst" || str == "\\$allseq") {
if (GetSize(children) == 1) {

18
tests/simple/loop_prefix_case.v Normal file
View File

@ -0,0 +1,18 @@
module top(
input wire x,
output reg y
);
localparam I = 1;
genvar i;
generate
for (i = 0; i < 1; i = i + 1) begin : blk
wire [i:i] z = x;
end
endgenerate
always @* begin
case (blk[I - 1].z)
1: y = 0;
0: y = 1;
endcase
end
endmodule