From 4fdcf388d3b8c9a0abea76d3d1b8c969627ed32f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Povi=C5=A1er?= Date: Mon, 12 Feb 2024 12:32:50 +0100 Subject: [PATCH] check: Assert edges data is not out-of-bounds --- passes/cmds/check.cc | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/passes/cmds/check.cc b/passes/cmds/check.cc index 070a3fb9d..bb169b4f9 100644 --- a/passes/cmds/check.cc +++ b/passes/cmds/check.cc @@ -160,8 +160,12 @@ struct CheckPass : public Pass { void add_edge(RTLIL::Cell *cell, RTLIL::IdString from_port, int from_bit, RTLIL::IdString to_port, int to_bit, int) override { - SigBit from = sigmap(cell->getPort(from_port))[from_bit]; - SigBit to = sigmap(cell->getPort(to_port))[to_bit]; + SigSpec from_portsig = cell->getPort(from_port); + SigSpec to_portsig = cell->getPort(to_port); + log_assert(from_bit >= 0 && from_bit < from_portsig.size()); + log_assert(to_bit >= 0 && to_bit < to_portsig.size()); + SigBit from = sigmap(from_portsig[from_bit]); + SigBit to = sigmap(to_portsig[to_bit]); if (from.wire && to.wire) topo.edge(std::make_pair(from.wire->name, from.offset), std::make_pair(to.wire->name, to.offset));