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Fixed two bugs in mem2reg functionality in AST frontend

This commit is contained in:
Clifford Wolf 2013-11-18 19:55:12 +01:00
parent 79910a5547
commit 4f2edcf2f9
1 changed files with 8 additions and 4 deletions
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4
frontends/ast/simplify.cc
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@ -801,6 +801,7 @@ skip_dynamic_range_lvalue_expansion:;
while (wire_en->simplify(true, false, false, 1, -1, false)) { } while (wire_en->simplify(true, false, false, 1, -1, false)) { }
std::vector<RTLIL::State> x_bits; std::vector<RTLIL::State> x_bits;
for (int i = 0; i < mem_width; i++)
x_bits.push_back(RTLIL::State::Sx); x_bits.push_back(RTLIL::State::Sx);
AstNode *assign_addr = new AstNode(AST_ASSIGN_LE, new AstNode(AST_IDENTIFIER), mkconst_bits(x_bits, false)); AstNode *assign_addr = new AstNode(AST_ASSIGN_LE, new AstNode(AST_IDENTIFIER), mkconst_bits(x_bits, false));
@ -1280,12 +1281,14 @@ void AstNode::mem2reg_as_needed_pass2(std::set<AstNode*> &mem2reg_set, AstNode *
AstNode *wire_addr = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(addr_bits-1, true), mkconst_int(0, true))); AstNode *wire_addr = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(addr_bits-1, true), mkconst_int(0, true)));
wire_addr->str = id_addr; wire_addr->str = id_addr;
if (block)
wire_addr->attributes["\\nosync"] = AstNode::mkconst_int(1, false); wire_addr->attributes["\\nosync"] = AstNode::mkconst_int(1, false);
mod->children.push_back(wire_addr); mod->children.push_back(wire_addr);
while (wire_addr->simplify(true, false, false, 1, -1, false)) { } while (wire_addr->simplify(true, false, false, 1, -1, false)) { }
AstNode *wire_data = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(mem_width-1, true), mkconst_int(0, true))); AstNode *wire_data = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(mem_width-1, true), mkconst_int(0, true)));
wire_data->str = id_data; wire_data->str = id_data;
if (block)
wire_data->attributes["\\nosync"] = AstNode::mkconst_int(1, false); wire_data->attributes["\\nosync"] = AstNode::mkconst_int(1, false);
mod->children.push_back(wire_data); mod->children.push_back(wire_data);
while (wire_data->simplify(true, false, false, 1, -1, false)) { } while (wire_data->simplify(true, false, false, 1, -1, false)) { }
@ -1308,6 +1311,7 @@ void AstNode::mem2reg_as_needed_pass2(std::set<AstNode*> &mem2reg_set, AstNode *
} }
std::vector<RTLIL::State> x_bits; std::vector<RTLIL::State> x_bits;
for (int i = 0; i < mem_width; i++)
x_bits.push_back(RTLIL::State::Sx); x_bits.push_back(RTLIL::State::Sx);
AstNode *cond_node = new AstNode(AST_COND, new AstNode(AST_DEFAULT), new AstNode(AST_BLOCK)); AstNode *cond_node = new AstNode(AST_COND, new AstNode(AST_DEFAULT), new AstNode(AST_BLOCK));