riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Remove noise from ice40/cells_sim.v

This commit is contained in:
Eddie Hung 2019-06-27 16:11:39 -07:00
parent 9398921af1
commit 4daa746797
1 changed files with 0 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
techlibs/ice40/cells_sim.v
View File

@ -144,12 +144,8 @@ endmodule
// Positive Edge SiliconBlue FF Cells
module SB_DFF (output `SB_DFF_REG, input C, D);
`ifndef _ABC
always @(posedge C)
Q <= D;
`else
always @* Q <= D;
`endif
endmodule
module SB_DFFE (output `SB_DFF_REG, input C, E, D);
@ -896,7 +892,6 @@ module SB_WARMBOOT (
);
endmodule
(* nomem2reg *)
module SB_SPRAM256KA (
input [13:0] ADDRESS,
input [15:0] DATAIN,