mirror of https://github.com/YosysHQ/yosys.git
Fix spacing
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@ -147,7 +147,7 @@ module \$_MUX8_ (A, B, C, D, E, F, G, H, S, T, U, Y);
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input A, B, C, D, E, F, G, H, S, T, U;
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input A, B, C, D, E, F, G, H, S, T, U;
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output Y;
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output Y;
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wire [1:0] Z;
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wire [1:0] Z;
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assign Z = T ? (S ? {D,H} : {C,G}) :
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assign Z = T ? (S ? {D,H} : {C,G}) :
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(S ? {B,F} : {A,E});
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(S ? {B,F} : {A,E});
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MUXF7 fpga_muxf7 (.I0(Z[0]), .I1(Z[1]), .S(U), .O(Y));
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MUXF7 fpga_muxf7 (.I0(Z[0]), .I1(Z[1]), .S(U), .O(Y));
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@ -157,9 +157,9 @@ module \$_MUX16_ (A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, S, T, U, V, Y)
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input A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, S, T, U, V;
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input A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, S, T, U, V;
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output Y;
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output Y;
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wire [1:0] Z;
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wire [1:0] Z;
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\$_MUX8_ fpga_mux8_0 (.A(A), .B(B), .C(C), .D(D), .E(E), .F(F), .G(G), .H(H), .S(S), .T(T), .U(U), .Y(Z[0]));
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\$_MUX8_ fpga_mux8_0 (.A(A), .B(B), .C(C), .D(D), .E(E), .F(F), .G(G), .H(H), .S(S), .T(T), .U(U), .Y(Z[0]));
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\$_MUX8_ fpga_mux8_1 (.A(I), .B(J), .C(K), .D(L), .E(M), .F(N), .G(O), .H(P), .S(S), .T(T), .U(U), .Y(Z[1]));
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\$_MUX8_ fpga_mux8_1 (.A(I), .B(J), .C(K), .D(L), .E(M), .F(N), .G(O), .H(P), .S(S), .T(T), .U(U), .Y(Z[1]));
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MUXF8 fpga_muxf8 (.I0(Z[0]), .I1(Z[1]), .S(V), .O(Y));
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MUXF8 fpga_muxf8 (.I0(Z[0]), .I1(Z[1]), .S(V), .O(Y));
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endmodule
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endmodule
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`endif // NO_MUXFN
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`endif // NO_MUXFN
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