mirror of https://github.com/YosysHQ/yosys.git
booth: Replace the default signed architecture
Generalize what was formerly the unsigned-only architecture to support both signed and unsigned multiplication, use that as default, and set aside the special low-power architecture that was formerly used for signed multipliers.
This commit is contained in:
Martin Povišer
parent
f50894d8bf
commit
48b73be8c6
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@ -276,18 +276,12 @@ struct BoothPassWorker {
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}
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log_assert(GetSize(Y) == required_op_size);
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if (!is_signed) /* unsigned multiplier */
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CreateBoothUMult(module,
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A, // multiplicand
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B, // multiplier(scanned)
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Y // result
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);
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else /* signed multiplier */
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CreateBoothSMult(module,
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A, // multiplicand
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B, // multiplier(scanned)
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Y // result (sized)
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);
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CreateBoothMult(module,
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A, // multiplicand
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B, // multiplier(scanned)
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Y, // result
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is_signed
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);
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module->remove(cell);
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booth_counter++;
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@ -295,24 +289,23 @@ struct BoothPassWorker {
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}
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/*
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Build Unsigned Multiplier.
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Build Multiplier.
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-------------------------
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Create a booth unsigned multiplier.
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Uses a generic booth multiplier with
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extra row of decoders and extended multiplier
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Uses a generic booth multiplier
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*/
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void CreateBoothUMult(RTLIL::Module *module,
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void CreateBoothMult(RTLIL::Module *module,
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SigSpec X, // multiplicand
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SigSpec Y, // multiplier
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SigSpec Z)
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SigSpec Z,
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bool is_signed)
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{ // result
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int z_sz = Z.size();
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SigSpec one_int, two_int, s_int, sb_int;
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int encoder_count = 0;
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BuildBoothUMultEncoders(Y, one_int, two_int, s_int, sb_int, module, encoder_count);
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BuildBoothMultEncoders(Y, one_int, two_int, s_int, sb_int, module, encoder_count, is_signed);
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// Build the decoder rows
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// format of each Partial product to be passed to CSA
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@ -326,7 +319,7 @@ struct BoothPassWorker {
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// Row 0: special case 1. Format S/.S.S.C.Data
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SigSpec ppij_row_0;
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BuildBoothUMultDecoderRow0(module, X, s_int, sb_int, one_int, two_int, ppij_row_0);
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BuildBoothMultDecoderRow0(module, X, s_int, sb_int, one_int, two_int, ppij_row_0, is_signed);
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// data, shift, sign
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ppij_int.push_back(std::make_tuple(ppij_row_0, 0, s_int[0]));
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@ -335,9 +328,10 @@ struct BoothPassWorker {
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// format 1,S.Data.shift = encoder_ix*2,sign = sb_int[i]
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SigSpec ppij_row_n;
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BuildBoothUMultDecoderRowN(module,
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BuildBoothMultDecoderRowN(module,
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X, // multiplicand
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one_int[i], two_int[i], s_int[i], sb_int[i], ppij_row_n, i
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one_int[i], two_int[i], s_int[i], sb_int[i], ppij_row_n, i,
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is_signed
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);
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// data, shift, sign
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ppij_int.push_back(std::make_tuple(ppij_row_n, i * 2, s_int[i]));
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@ -373,6 +367,7 @@ struct BoothPassWorker {
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// Debug code: Dump out the csa trees
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// DumpCSATrees(debug_csa_trees);
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// Build the CPA to do the final accumulation.
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BuildCPA(module, s_vec, c_vec, Z);
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}
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@ -380,11 +375,12 @@ struct BoothPassWorker {
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Build Row 0 of decoders
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*/
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void BuildBoothUMultDecoderRow0(RTLIL::Module *module,
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void BuildBoothMultDecoderRow0(RTLIL::Module *module,
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SigSpec X, // multiplicand
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SigSpec s_int, SigSpec sb_int, SigSpec one_int,
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SigSpec two_int, SigSpec &ppij_vec)
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SigSpec two_int, SigSpec &ppij_vec, bool is_signed)
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{
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(void)sb_int;
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(void)module;
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int x_sz = GetSize(X);
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SigBit ppij;
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@ -397,21 +393,32 @@ struct BoothPassWorker {
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ppij_vec.append(Bur4d_n(stringf("row0_dec_%d", i), X[i], X[i - 1],
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one_int[0], two_int[0], s_int[0]));
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// The redundant bit. Duplicate decoding of last bit.
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ppij_vec.append(Bur4d_msb("row0_dec_msb", X[x_sz - 1], two_int[0], s_int[0]));
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if (!is_signed) {
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ppij_vec.append(Bur4d_msb("row0_dec_msb", X.msb(), two_int[0], s_int[0]));
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} else {
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ppij_vec.append(Bur4d_n("row0_dec_msb", X.msb(), X.msb(),
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one_int[0], two_int[0], s_int[0]));
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}
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// append the sign bits
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ppij_vec.append(s_int[0]);
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ppij_vec.append(s_int[0]);
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ppij_vec.append(sb_int[0]);
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if (is_signed) {
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SigBit e = module->XorGate(NEW_ID, s_int[0], module->AndGate(NEW_ID, X.msb(), module->OrGate(NEW_ID, two_int[0], one_int[0])));
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ppij_vec.append({module->NotGate(NEW_ID, e), e, e});
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} else {
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// append the sign bits
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ppij_vec.append({module->NotGate(NEW_ID, s_int[0]), s_int[0], s_int[0]});
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}
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}
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// Build a generic row of decoders.
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void BuildBoothUMultDecoderRowN(RTLIL::Module *module,
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void BuildBoothMultDecoderRowN(RTLIL::Module *module,
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SigSpec X, // multiplicand
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SigSpec one_int, SigSpec two_int, SigSpec s_int, SigSpec sb_int,
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SigSpec &ppij_vec, int row_ix)
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SigSpec &ppij_vec, int row_ix,
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bool is_signed)
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{
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(void)module;
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int x_sz = GetSize(X);
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@ -424,13 +431,14 @@ struct BoothPassWorker {
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ppij_vec.append(Bur4d_n(stringf("row_%d_dec_%d", row_ix, i), X[i], X[i - 1],
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one_int, two_int, s_int));
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// redundant bit
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ppij_vec.append(Bur4d_msb("row_dec_red", X[x_sz - 1], two_int, s_int));
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if (!is_signed) { // redundant bit
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ppij_vec.append(Bur4d_msb("row_dec_red", X[x_sz - 1], two_int, s_int));
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} else {
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ppij_vec.append(Bur4d_n(stringf("row_%d_dec_msb", row_ix), X[x_sz - 1], X[x_sz - 1],
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one_int, two_int, s_int));
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}
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// sign bit
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ppij_vec.append(sb_int);
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// constant bit
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ppij_vec.append(!is_signed ? sb_int[0] : module->XorGate(NEW_ID, sb_int, module->AndGate(NEW_ID, X.msb(), module->OrGate(NEW_ID, two_int, one_int))));
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ppij_vec.append(State::S1);
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}
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@ -807,12 +815,12 @@ struct BoothPassWorker {
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}
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}
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void BuildBoothUMultEncoders(SigSpec Y, SigSpec &one_int, SigSpec &two_int,
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SigSpec &s_int, SigSpec &sb_int, RTLIL::Module *module, int &encoder_ix)
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void BuildBoothMultEncoders(SigSpec Y, SigSpec &one_int, SigSpec &two_int,
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SigSpec &s_int, SigSpec &sb_int, RTLIL::Module *module, int &encoder_ix, bool is_signed)
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{
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int y_sz = GetSize(Y);
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for (int y_ix = 0; y_ix < y_sz;) {
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for (int y_ix = 0; y_ix < (!is_signed ? y_sz : y_sz - 1);) {
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std::string enc_name = stringf("bur_enc_%d", encoder_ix);
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two_int.append(module->addWire(NEW_ID_SUFFIX(stringf("two_int_%d", encoder_ix)), 1));
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@ -838,7 +846,7 @@ struct BoothPassWorker {
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bool need_padded_cell = false;
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if (y_ix > y_sz - 1) {
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y0 = State::S0;
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y0 = is_signed ? Y.msb() : State::S0;
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need_padded_cell = false;
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} else {
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y0 = Y[y_ix];
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@ -847,7 +855,7 @@ struct BoothPassWorker {
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if (y_ix > y_sz - 1) {
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need_padded_cell = false;
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y1 = State::S0;
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y1 = is_signed ? Y.msb() : State::S0;
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} else {
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y1 = Y[y_ix];
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y_ix++;
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@ -855,10 +863,10 @@ struct BoothPassWorker {
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if (y_ix > y_sz - 1) {
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need_padded_cell = false;
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y2 = State::S0;
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y2 = is_signed ? Y.msb() : State::S0;
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} else {
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if (y_ix == y_sz - 1)
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need_padded_cell = true;
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need_padded_cell = !is_signed;
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else
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need_padded_cell = false;
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y2 = Y[y_ix];
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