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Merge pull request #1183 from whitequark/ice40-always-relut 

synth_ice40: switch -relut to be always on
This commit is contained in:
Clifford Wolf 2019-07-12 10:48:00 +02:00 committed by GitHub
parent 19c1c3cfa3 b700a4b1c5
commit 463f710066
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 5 additions and 11 deletions
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16
techlibs/ice40/synth_ice40.cc
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@ -67,9 +67,6 @@ struct SynthIce40Pass : public ScriptPass
log(" -retime\n"); log(" -retime\n");
log(" run 'abc' with -dff option\n"); log(" run 'abc' with -dff option\n");
log("\n"); log("\n");
log(" -relut\n");
log(" combine LUTs after synthesis\n");
log("\n");
log(" -nocarry\n"); log(" -nocarry\n");
log(" do not use SB_CARRY cells in output netlist\n"); log(" do not use SB_CARRY cells in output netlist\n");
log("\n"); log("\n");
@ -78,7 +75,7 @@ struct SynthIce40Pass : public ScriptPass
log("\n"); log("\n");
log(" -dffe_min_ce_use <min_ce_use>\n"); log(" -dffe_min_ce_use <min_ce_use>\n");
log(" do not use SB_DFFE* cells if the resulting CE line would go to less\n"); log(" do not use SB_DFFE* cells if the resulting CE line would go to less\n");
log(" than min_ce_use SB_DFFE*in output netlist\n"); log(" than min_ce_use SB_DFFE* in output netlist\n");
log("\n"); log("\n");
log(" -nobram\n"); log(" -nobram\n");
log(" do not use SB_RAM40_4K* cells in output netlist\n"); log(" do not use SB_RAM40_4K* cells in output netlist\n");
@ -106,7 +103,7 @@ struct SynthIce40Pass : public ScriptPass
} }
string top_opt, blif_file, edif_file, json_file, abc, device_opt; string top_opt, blif_file, edif_file, json_file, abc, device_opt;
bool nocarry, nodffe, nobram, dsp, flatten, retime, relut, noabc, abc2, vpr; bool nocarry, nodffe, nobram, dsp, flatten, retime, noabc, abc2, vpr;
int min_ce_use; int min_ce_use;
void clear_flags() YS_OVERRIDE void clear_flags() YS_OVERRIDE
@ -122,7 +119,6 @@ struct SynthIce40Pass : public ScriptPass
dsp = false; dsp = false;
flatten = true; flatten = true;
retime = false; retime = false;
relut = false;
noabc = false; noabc = false;
abc2 = false; abc2 = false;
vpr = false; vpr = false;
@ -175,7 +171,7 @@ struct SynthIce40Pass : public ScriptPass
continue; continue;
} }
if (args[argidx] == "-relut") { if (args[argidx] == "-relut") {
relut = true; // removed, opt_lut is always run
continue; continue;
} }
if (args[argidx] == "-nocarry") { if (args[argidx] == "-nocarry") {
@ -347,10 +343,8 @@ struct SynthIce40Pass : public ScriptPass
run(abc + " -dress -lut 4", "(skip if -noabc)"); run(abc + " -dress -lut 4", "(skip if -noabc)");
} }
run("clean"); run("clean");
if (relut || help_mode) { run("ice40_unlut");
run("ice40_unlut", " (only if -relut)"); run("opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3");
run("opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3", "(only if -relut)");
}
} }
if (check_label("map_cells")) if (check_label("map_cells"))