From 44bf4ac35cf9f4fa81b8c9ae7f6e2f724e11934d Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Wed, 18 Sep 2019 12:35:24 -0700
Subject: [PATCH] Add doc on pattern detector for overflow

---
 passes/pmgen/xilinx_dsp.cc | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/passes/pmgen/xilinx_dsp.cc b/passes/pmgen/xilinx_dsp.cc
index 8500a6072..5af48e4d2 100644
--- a/passes/pmgen/xilinx_dsp.cc
+++ b/passes/pmgen/xilinx_dsp.cc
@@ -2,6 +2,7 @@
  *  yosys -- Yosys Open SYnthesis Suite
  *
  *  Copyright (C) 2012  Clifford Wolf <clifford@clifford.at>
+ *                2019  Eddie Hung    <eddie@fpgeh.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above
@@ -519,6 +520,10 @@ struct XilinxDspPass : public Pass {
 		log("the add/subtract operator will cause those operations to be implemented using\n");
 		log("the 'SIMD' feature of DSPs.\n");
 		log("\n");
+		log("Experimental feature: the presence of a `$ge' cell attached to the registered\n");
+		log("P output implementing the operation \"(P >= <power-of-2>)\" will be transformed\n");
+		log("into using the DSP48E1's pattern detector feature for overflow detection.\n");
+		log("\n");
 	}
 	void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
 	{