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@ -104,7 +104,7 @@ void pack_xilinx_dsp(dict<SigBit, Cell*> &bit_to_driver, xilinx_dsp_pm &pm)
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if (st.ffP->type == "$dff")
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cell->setPort("\\CEM", State::S1);
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//else if (st.ffP->type == "$dffe")
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// cell->setPort("\\CEP", st.ffP->getPort("\\EN"));
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// cell->setPort("\\CEM", st.ffM->getPort("\\EN"));
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else log_abort();
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}
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if (st.ffP) {
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