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Merge pull request #14 from alainmarcel/new_peepopts 

New peepopts
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alaindargelas 2024-12-19 14:24:58 -08:00 committed by GitHub
parent 5b97274f3a 8687e5f4fb
commit 43f4181957
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GPG Key ID: B5690EEEBB952194
1 changed files with 4 additions and 2 deletions
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6
passes/pmgen/peepopt_muldiv_c.pmg
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@ -47,13 +47,15 @@ code
int offset = GetSize(div_a) - GetSize(mul_y);
// Get properties and values of b_const and c_const
int b_const_width = mul->getParam(ID::B_WIDTH).as_int();
// b_const may be coming from the A port but it's an RTLIL invariant that A_SIGNED equals B_SIGNED
bool b_const_signed = mul->getParam(ID::B_SIGNED).as_bool();
bool c_const_signed = div->getParam(ID::B_SIGNED).as_bool();
int b_const_int = b_const.as_int(b_const_signed);
int c_const_int = c_const.as_int(c_const_signed);
int b_const_int_shifted = b_const_int << offset;
// Calculate the constant and compress the width to fit the value
Const const_ratio = b_const_int_shifted / c_const_int;
const_ratio.compress(b_const_signed | c_const_signed);
// Integer values should be lesser than 64 bits
if (mul->getParam(ID::B_WIDTH).size() > 64)
@ -77,7 +79,7 @@ code
reject;
// Rewire to only keep multiplier
mul->setPort(\B, Const(b_const_int_shifted / c_const_int, b_const_width));
mul->setPort(\B, const_ratio);
mul->setPort(\Y, div_y);
// Remove divider