riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

synth_intel_alm: VQM support

This commit is contained in:
Dan Ravensloft 2020-04-15 14:28:35 +01:00 committed by Marcelina Kościelnicka
parent d7da491002
commit 43cc6bd8a1
2 changed files with 3 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
techlibs/intel_alm/common/quartus_rename.v
View File

@ -12,12 +12,8 @@ MISTRAL_ALUT2 #(.LUT(4'b0000)) _TECHMAP_REPLACE_ (.A(1'b1), .B(1'b1), .Q(Q));
endmodule
module MISTRAL_FF(input D, CLK, ACn, ALD, AD, EN, output reg Q);
module MISTRAL_FF(input DATAIN, CLK, ACLR, ENA, SCLR, SLOAD, SDATA, output reg Q);
parameter INIT = 1'b0;
localparam [1023:0] INIT_STR = (INIT !== 1'b1) ? "low" : "high";
dffeas #(.power_up(INIT_STR), .is_wysiwyg("true")) _TECHMAP_REPLACE_ (.d(D), .clk(CLK), .clrn(ACn), .aload(ALD), .asdata(AD), .ena(EN), .q(Q));
dffeas #(.power_up("low"), .is_wysiwyg("true")) _TECHMAP_REPLACE_ (.d(DATAIN), .clk(CLK), .clrn(ACLR), .ena(ENA), .sclr(SCLR), .sload(SLOAD), .asdata(SDATA), .q(Q));
endmodule

1
techlibs/intel_alm/synth_intel_alm.cc
View File

@ -223,6 +223,7 @@ struct SynthIntelALMPass : public ScriptPass {
if (check_label("quartus")) {
if (quartus || help_mode) {
run("setundef -zero");
run("hilomap -singleton -hicell __MISTRAL_VCC Q -locell __MISTRAL_GND Q");
run("techmap -map +/intel_alm/common/quartus_rename.v");
run(stringf("techmap -map +/intel_alm/%s/quartus_rename.v", family_opt.c_str()));