diff --git a/tests/opt/bug2824.ys b/tests/opt/bug2824.ys
new file mode 100644
index 000000000..9d0d1e9e5
--- /dev/null
+++ b/tests/opt/bug2824.ys
@@ -0,0 +1,7 @@
+read_verilog -icells << EOT
+module top(input I, output O);
+$pmux #(.WIDTH(1), .S_WIDTH(2)) m (.S({I, 1'b0}), .A(1'b0), .B({I, 1'b0}), .Y(O));
+endmodule
+EOT
+
+equiv_opt -assert opt_muxtree