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Added a test for the Memory Content File inclusion using $readmemb 

Signed-off-by: Rodrigo Alejandro Melo <rodrigomelo9@gmail.com>
This commit is contained in:
Rodrigo Alejandro Melo 2020-02-01 17:41:10 -03:00
parent b4c30cfc8d
commit 43396fae2c
3 changed files with 63 additions and 0 deletions
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1
tests/memfile/.gitignore vendored Normal file
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temp*

23
tests/memfile/memory.v Normal file
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// A memory initialized with an external file
module memory (
input clk_i,
input we_i,
input [5:0] addr_i,
input [31:0] data_i,
output reg [31:0] data_o
);
parameter MEMFILE = "";
reg [31:0] mem [0:63];
initial $readmemb(MEMFILE,mem);
always @(posedge clk_i) begin
if (we_i)
mem[addr_i] <= data_i;
data_o <= mem[addr_i];
end
endmodule

39
tests/memfile/run-test.sh Executable file
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#!/bin/bash
echo "* Creating Memory Content Files"
for i in {1..64}
do
echo "00001111000000001111111100000000" >> tempfile1.dat
done
mkdir -p temp
cp tempfile1.dat temp/tempfile2.dat
cd ..
echo "* Running from the parent directory"
echo " * Memory Content File: tempfile1.dat"
../yosys -qp "read_verilog -defer memfile/memory.v; chparam -set MEMFILE \"tempfile1.dat\" memory; synth -top memory"
echo " * Memory Content File: temp/tempfile2.dat"
../yosys -qp "read_verilog -defer memfile/memory.v; chparam -set MEMFILE \"temp/tempfile2.dat\" memory; synth -top memory"
cd memfile
echo "* Running from the same directory"
echo " * Memory Content File: tempfile1.dat"
../../yosys -qp "read_verilog -defer memory.v; chparam -set MEMFILE \"tempfile1.dat\" memory; synth -top memory"
echo " * Memory Content File: temp/tempfile2.dat"
../../yosys -qp "read_verilog -defer memory.v; chparam -set MEMFILE \"temp/tempfile2.dat\" memory; synth -top memory"
cd temp
echo "* Running from a child directory"
echo " * Memory Content File: tempfile1.dat"
../../../yosys -qp "read_verilog -defer ../memory.v; chparam -set MEMFILE \"tempfile1.dat\" memory; synth -top memory"
echo " * Memory Content File: temp/tempfile2.dat"
../../../yosys -qp "read_verilog -defer ../memory.v; chparam -set MEMFILE \"temp/tempfile2.dat\" memory; synth -top memory"
echo " * Memory Content File: tempfile2.dat"
../../../yosys -qp "read_verilog -defer ../memory.v; chparam -set MEMFILE \"temp/tempfile2.dat\" memory; synth -top memory"
echo "* Done"