Add MAX10 and Cyclone IV items to CHANGELOG

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Clifford Wolf 2017-04-07 10:01:28 +02:00
parent 7791888703
commit 41d4e91f38
1 changed files with 13 additions and 0 deletions

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@ -3,6 +3,19 @@ List of major changes and improvements between releases
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Yosys 0.7 .. Yosys ???
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* MAX10 and Cyclone IV Support
- Added initial version of metacommand "synth_intel".
- Improved write_verilog command to produce VQM netlist for Quartus Prime.
- Added support for MAX10 FPGA family synthesis.
- Added support for Cyclone IV family synthesis.
- Added example of implementation for DE2i-150 board.
- Added example of implementation for MAX10 development kit.
- Added LFSR example from Asic World.
Yosys 0.6 .. Yosys 0.7
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