From 41a86fdb2ce311758c03a636afd851e0e335dacb Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Tue, 21 May 2024 14:07:20 +0200 Subject: [PATCH] fix --- techlibs/nanoxplore/cells_sim_u.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/techlibs/nanoxplore/cells_sim_u.v b/techlibs/nanoxplore/cells_sim_u.v index e7e8fcc9a..094adcaf8 100644 --- a/techlibs/nanoxplore/cells_sim_u.v +++ b/techlibs/nanoxplore/cells_sim_u.v @@ -142,7 +142,7 @@ module NX_RFB_U(WCK, I1, I2, I3, I4, I5, I6, I7, I8, I9, I10, I11, I12, I13, I14 integer i; initial begin for (i = 0; i < MEM_SIZE; i = i + 1) - mem[i] = MEM_SIZE'b0; + mem[i] = MEM_WIDTH'b0; end wire [ADDR_WIDTH-1:0] WA = (mode==2) ? { WA6, WA5, WA4, WA3, WA2, WA1 } : { WA5, WA4, WA3, WA2, WA1 };