diff --git a/techlibs/ecp5/cells_bb.v b/techlibs/ecp5/cells_bb.v
index e616d24d6..fc352a52c 100644
--- a/techlibs/ecp5/cells_bb.v
+++ b/techlibs/ecp5/cells_bb.v
@@ -223,7 +223,7 @@ endmodule
 
 (* blackbox *)
 module IDDRX2F(
-	input D, SCLK, ECLK, RST,
+	input D, SCLK, ECLK, RST, ALIGNWD,
 	output Q0, Q1, Q2, Q3
 );
 	parameter GSR = "ENABLED";
diff --git a/techlibs/ecp5/cells_sim.v b/techlibs/ecp5/cells_sim.v
index 76099f493..f9d503deb 100644
--- a/techlibs/ecp5/cells_sim.v
+++ b/techlibs/ecp5/cells_sim.v
@@ -799,6 +799,7 @@ module DP16KD(
 	parameter INITVAL_3D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
 	parameter INITVAL_3E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
 	parameter INITVAL_3F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
+	parameter INIT_DATA = "STATIC";
 endmodule
 
 `ifndef NO_INCLUDES