ast, rpc: record original name of $paramod\* as \hdlname attribute.

The $paramod name mangling is not invertible (the \ character, which
separates the module name from the parameters, is valid in the module
name itself), which does not stop people from trying to invert it.

This commit makes it easy to invert the name mangling by storing
the original name explicitly, and fixes the firrtl backend to use
the newly introduced attribute.
This commit is contained in:
whitequark 2020-04-18 03:43:15 +00:00
parent 115fc261e6
commit 41421f5dca
3 changed files with 7 additions and 11 deletions

View File

@ -306,17 +306,8 @@ struct FirrtlWorker
// If this is a parameterized module, its parent module is encoded in the cell type
if (cell->type.begins_with("$paramod"))
{
std::string::iterator it;
for (it = cell_type.begin(); it < cell_type.end(); it++)
{
switch (*it) {
case '\\': /* FALL_THROUGH */
case '=': /* FALL_THROUGH */
case '\'': /* FALL_THROUGH */
case '$': instanceOf.append("_"); break;
default: instanceOf.append(1, *it); break;
}
}
log_assert(cell->has_attribute(ID::hdlname));
instanceOf = cell->get_string_attribute(ID::hdlname);
}
else
{

View File

@ -1565,6 +1565,9 @@ std::string AstModule::derive_common(RTLIL::Design *design, const dict<RTLIL::Id
rewritten.reserve(GetSize(parameters));
AstNode *new_ast = ast->clone();
if (!new_ast->attributes.count(ID::hdlname))
new_ast->attributes[ID::hdlname] = AstNode::mkconst_str(stripped_name);
para_counter = 0;
for (auto child : new_ast->children) {
if (child->type != AST_PARAMETER)

View File

@ -217,6 +217,8 @@ struct RpcModule : RTLIL::Module {
module.second->name = mangled_name;
module.second->design = design;
module.second->attributes.erase(ID::top);
if (!module.second->has_attribute(ID::hdlname))
module.second->set_string_attribute(ID::hdlname, module.first.str());
design->modules_[mangled_name] = module.second;
derived_design->modules_.erase(module.first);
}